HDMP-3268 Datasheet, PDF (6/18 Pages) Agilent(Hewlett-Packard) – 3.2 Gbit/sec 68x68 Crosspoint Switch

USE
t_Dvalid
DOUT
t_Dinv
Figure 5. USE bit data valid/invalid timing diagram.
Table 4. USE Bit Timing
T_A = 0°C to T_C = 85°C, V_CC = V_DD = V_CC_DOUT = 2.35 V to 2.65 V
Symbol
Parameter
Unit
Min.
Typ.
t_Dvalid
USE bit set to valid DOUT
ns
t_Dinv
USE bit set to DOUT invalid
ns
6
Max.
40
Digital Interface I/O
Figure 6 shows simplified circuit
diagrams of the digital input and
output cells. The digital input cell
is applicable to all data and con-
trol inputs of the HDMP-3268.
The digital output cell used for
the HDMP-3268’s digital I/Os are
designed to be compatible with
either an SSTL_2 interface or with
an LVTTL interface. The digital
input cell has the option of
providing an on-chip 50 Ω
termination resistor. The 50 Ω
termination is connected to the
digital input when the TERM pin
is high. When the HDMP-3268 is
used with an SSTL_2 interface,
the VREF output of the control-
ling chip should be connected to
the VREFI pin on the HDMP-
3268. This gives the best noise
margin performance since the
VREF output signal of the con-
trolling chip should be centered
with respect to its output swing.
Alternatively, for best perfor-
mance, the HDMP-3268’s VREFO
output, which provides an output
voltage of approximately one half
of the supply, should be con-
nected to the VREFI pin of the
controlling chip. A 0.1 µF bypass
capacitor should also be con-
nected at the VREFI pin.
For an LVTTL interface, the
HDMP-3268 provides a reference
voltage of nominally 1.4 V on the
VREF14 pin. When the HDMP-
3268 is used with a 3.3 V LVTTL
system, its VREF14 pin should be
connected to its VREFI pin.
The nominal output impedance
for the digital output is 25 Ω.
Therefore, when connecting the
HDMP-3268 unterminated for a
distributed point-to-point
topology, a 25 Ω resistor should
be added in series with the data
I/O lines to match 50 Ω traces on
the PC board. For lumped circuit
connections the 25 Ω series
resistor is not necessary.
The HDMP-3268 has termination
amplifiers built in for distributed
multichip connections where the
SSTL_2 I/Os need to be
terminated. Note that a
terminated connection consumes
significant power, so terminations
6