HDMP-3268 Datasheet, PDF (4/18 Pages) Agilent(Hewlett-Packard) – 3.2 Gbit/sec 68x68 Crosspoint Switch

multiple HDMP-3268s to reside
on the same address and data
buses. When CS is high, the
HDMP-3268 does not accept
data, and the HDMP-3268’s data
outputs are tri-stated. In
broadcast write mode, (CH[6:0]
set to ‘1111111’), all registers of
the selected set (control or
address) receive the same data
value. This feature simplifies chip
configuration upon power-up. By
default, all registers are
programmed to 0 at power-up
provided V_CC comes up at the
same time or after V_DD.
WSTB
CS
PW
CH[6:0]
SET CNTL
DATA[6:0]
t_cs
READ MODE
tDaccess
t_WHiZ
Figure 4. Timing diagram for accessing HDMP-3268 registers.
WRITE MODE
tpw
t_Dsetup
t_Csetup
t_CHsetup
t_Chold
t_CHhold
t_Dhold
t_period
Table 1. HDMP-3268 Interface Timing Requirements
T_A = 0°C to T_C = 85°C, V_CC = V_DD = V_CC_DOUT = 2.35 V to 2.65 V
Symbol
Parameter
t_period
Write Strobe Period
t_pw
t_rise/fall
Write Strobe Pulse Width
Write Strobe Rise and Fall Times
t_Dsetup
Data Setup Time
t_Dhold
t_CHsetup
Data Hold Time
Channel Setup Time
t_CHhold
Channel Hold Time
t_Csetup
t_Chold
Control Setup Time
Control Hold Time
t_cs
Chip Select to Data Out
t_Daccess
t_WHiZ
Data Access Time
Write Assert to High Z Time
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Min.
Typ.
Max.
15.2
3
0.6* t_period
2
2
1
0.5
0
8
1
4
3
–0.7
–1.2
5
7.4
10
13
3
4
4