HDMP-3268 Datasheet, PDF (1/18 Pages) Agilent(Hewlett-Packard) – 3.2 Gbit/sec 68x68 Crosspoint Switch

Agilent HDMP-3268
3.2 Gbit/sec 68x68 Crosspoint Switch
Data Sheet
Description
The HDMP-3268 is a 68x68 digital
crosspoint switch with data handling
capacities of up to 3.2 Gbit/sec on
each channel. The non-blocking
switch uses 68 fully independent
multiplexers to allow each output
port to be independently pro-
grammed to be connected to any
input port. All data channels are
designed with a fully differential
architecture to insure data integrity
and resistance to noise and crosstalk.
The part is designed in a reliable
BiCMOS process, operates off of a
single 2.5 V supply and is packaged
in a 400 pin HPBGA.
Data comes in to each of the 68 ports
as a DC balanced differential signal
(DIN[0:67]). Each input port then
presents the data to the input of a
multiplexer, which routes the signal
to the selected output port
(DOUT[0:67]). Input and output
ports are required to be AC-coupled
unless connected to either this or
another HDMP-3268. The crosspoint
switch multiplexers are controlled by
68 address registers (one for each
multiplexer). The address registers
are programmed through the
program and control pins.
The high-speed input buffer
contains input equalization to
improve signal integrity over
copper traces. The equalization
may be modified on an individual
port basis through use of the
program and control pins
(DATA[6:0], CH[6:0], WSTB,
CNTL, CS and RW). The crosspoint
switch address and control register
configuration may be read back
from the switch through use of the
RW and CNTL inputs.
The DC levels of the high speed
outputs are consistent with the
input levels of the high speed
inputs. Therefore, the outputs of
the HDMP-3268 can be connected
to inputs of the HDMP-3268
without blocking capacitors as long
as the supply voltages for the two
parts are identical.
Features
• Supports data rates up to 3.2 Gbit/sec
on each channel
• Fully differential high-speed signal
path for highest signal integrity
• Implemented as 68 independent
68-input multiplexers
• Supports broadcast/multicast modes.
Inputs can be connected to multiple
outputs
• Provides two independent switch
matrix configuration register sets
• Low jitter, low crosstalk
• Individually programmable high-
speed output signal amplitude to
optimize drive of various PCB and
backplane distances
• Individually programmable input
equalization for better signal integrity
• Unused input and output channels can
be powered off to reduce power
consumption
• Broadcast programming mode to
rapidly configure the default switch
settings
• SSTL_2 and LVTTL compatible inputs
and outputs on the programming bus
and the control signals
• Single supply voltage of 2.5 V
• Low power 13.5 W maximum
• Packaged in a 400-pin High Perfor-
mance Ball Grid Array (HPBGA)
• Implemented in a high performance
BiCMOS process
Applications
• Optical cross connect switches
• Optical add-drop multiplexers
• Telecom switches
• Other optical (OEO) switch fabrics
• Backplane interconnect switch
fabrics