HDMP-1032 Datasheet, PDF (28/32 Pages) Agilent(Hewlett-Packard) – 1.4 GBd Transmitter/Receiver Chip Set with CIMT Encoder/Decoder and Variable Data Rate

HSOUT+
Tx
HDMP-1032
HSOUT–
50 Ω
50 Ω
0.1 µF
HSIN+
Rx
HDMP-1034
HSIN–
0.1 µF
A) G-LINK Tx TO Rx INTERCONNECTION
NOTE THAT NO EXTERNAL TERMINATIONS OR BIAS RESISTORS ARE REQUIRED.
HSOUT+
Tx
HDMP-1032
HSOUT–
+V_CC
0.1 µF
R1
R1 _{PECL INPUT}
Z0
0.1 µF
+
Z0
0.1 µF
_
R2
R2
B) DIFFERENTIAL DRIVE TO GENERIC PECL INPUT
THE THEVENIN EQUIVALENT RESISTANCE IS EQUAL TO THE TRANSMISSION LINE
IMPEDANCE (Z0) AND PROVIDES PROPER DC BIAS TO THE PECL INPUTS.
Figure 15. Methods of Interfacing HS_OUT and HS_IN.
PECL OUTPUT
Z0
Z0
R1
R1
0.1 µF
0.1 µF
HSIN+
Rx
HDMP-1034
HSIN–
C) GENERIC PECL OUTPUT TO G-LINK Rx INPUT
RESISTOR VALUE R1 SETS PROPER BIAS FOR THE PECL OUTPUT STAGE.
THE G-LINK Rx IS INTERNALLY TERMINATED AND DOESN'T REQUIRE
EXTERNAL BIAS OR TERMINATION RESISTORS.
HSOUT+
Tx
HDMP-1032
HSOUT–
HSIN+
Rx
HDMP-1034
HSIN–
50 Ω
+5 V
0.1 µF
68 Ω
0.1 µF
OPTICAL
TRANSCEIVER
68 Ω
(+5 V)
TD+
50 Ω
0.1 µF
191 Ω
TD–
191
Ω
50 Ω
50 Ω
0.1 µF
RD+
0.1 µF
270 Ω
RD–
270 Ω
D) G-LINK INTERFACE TO OPTICAL TRANSCEIVER
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