BC9824 Datasheet, PDF (17/22 Pages) Holtek Semiconductor Inc – Low Power High Performance Low Power High Performance

BC9824
Register Bank 1
Address
(Hex)
Mnemonic
00
01
02
03
04
05
06
07
RBANK
08 Chip ID
09
0A
0B
0C
0D
0E RAMP
Bit Reset Value
Type
Description
Write when normal
mode.
31:0
0
Read received Must write with 0x858AC01C
total bits when
BER test mode.
Write when normal
mode.
31:0
0
Read received Must write with 0x1103C960
error bits when
BER test mode.
31:0
0
W
Must write with 0x00000004
31:0 0x03001200
W
Must write with 0x00000004
31:0
0
For normal work mode:
1Mbps,2Mbps: 0x437D563F
250Kbps: 0x437D663F
W
For single carrier mode:
Low Power: 0x437D563F
Normal Power: 0x417D563F
31:0
0
250kbps :0x74106C9F
W
1Mbps :0x14126C9F
2Mbps :0x74114C9F
31:0
0
W
Must write with 0x0007C022
6:0
31:8
0
W
Reserved
7
0
Register bank selection states. Switch
register bank is done by SPI command
R
“ACTIVATE” followed by 0x53
0: Register bank 0
1: Register bank 1
31:0
0
R
Store the chip ID
0
R/W
Reserved
0
R/W
Reserved
0
R/W
Reserved
31:0
0
R/W
Please initialize with 0x05731200
For 120us mode:0x00731200
31:0
0
R/W
Please initialize with 0x0080B434
87:0
NA
Ramp curve
R/W
Please write with
0x CFFFBDF3CF208082041041
Note: Don’t write reserved registers and no definition registers in register bank 1
Rev. 1.00
17
October 20, 2015