BC9824 Datasheet, PDF (10/22 Pages) Holtek Semiconductor Inc – Low Power High Performance Low Power High Performance

BC9824
Command name
Command word
(binary)
R_REGISTER
000A AAAA
W_REGISTER
001A AAAA
R_RX_PAYLOAD
W_TX_PAYLOAD
FLUSH_TX
FLUSH_RX
0110 0001
1010 0000
1110 0001
1110 0010
REUSE_TX_PL
1110 0011
ACTIVATE
0101 0000
R_RX_PL_WID
0110 0000
W_ACK_
PAYLOAD
1010 1PPP
W_TX_PAYLOAD_
NO
ACK
NOP
1011 0000
1111 1111
# Data bytes
Operation
1 to 5
LSB byte first
1 to 5
LSB byte first
1 to 32
LSB byte first
Read command and status registers. AAAAA =
5 bit Register Map Address
Write command and status registers. AAAAA = 5
bit Register Map Address
Executable in power down or standby modes only.
Read RX-payload: 1 – 32 bytes. A read operation always
starts at byte 0. Payload is deleted from FIFO after it is
read. Used in RX mode.
1 to 32 Write TX-payload: 1 – 32 bytes. A write operation always
LSB byte first starts at byte 0 used in TX payload.
0
Flush TX FIFO, used in TX mode
Flush RX FIFO, used in RX mode
0
Should not be executed during transmission of
acknowledge, that is, acknowledge package will not be
completed.
Used for a PTX device
Reuse last transmitted payload. Packets are repeatedly
retransmitted as long as CE is high.
0
TX payload reuse is active until
W_TX_PAYLOAD or FLUSH TX is executed. TX
payload reuse must not be activated or deactivated
during package transmission
This write command followed by data 0x73 activates the
following features:
• R_RX_PL_WID
• W_ACK_PAYLOAD
• W_TX_PAYLOAD_NOACK
A new ACTIVATE command with the same data
deactivates them again. This is executable in power
down or stand by modes only.
The R_RX_PL_WID, W_ACK_PAYLOAD, and
1
W_TX_PAYLOAD_NOACK features registers are initially
in a deactivated state; a write has no effect, a read only
results in zeros on MISO. To activate these registers,
use the ACTIVATE command followed by data 0x73.
Then they can be accessed as any other register. Use
the same command and data to deactivate the registers
again.
This write command followed by data 0x53 toggles the
register bank, and the current register bank number can
be read out from REG7 [7]
Read RX-payload width for the top R_RX_PAYLOAD in
the RX FIFO.
1 to 32
LSB byte first
Used in RX mode.
Write Payload to be transmitted together with
ACK packet on PIPE PPP. (PPP valid in the range from
000 to 101). Maximum three ACK packet payloads can
be pending. Payloads with same PPP are handled using
first in - first out principle. Write payload: 1– 32 bytes. A
write operation always starts at byte 0.
1 to 32 Used in TX mode. Disables AUTOACK on this specific
LSB byte first packet.
0
No Operation. Might be used to read the STATUS
register
SPI Command
Rev. 1.00
10
October 20, 2015