HD404618 Datasheet, PDF (84/89 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404618 Series
During Transmit Clock Input
Item
Symbol Pin(s) Min
Typ
Max Test Condition Unit Notes
Transmit clock t_Scyc
cycle time
SCK
1
—
—
t_cyc/t_subcyc 1, 3
Transmit clock t_SCKH
SCK
0.5
—
—
high width
t _Scyc
1
Transmit clock t_SCKL
SCK
0.5
—
—
low width
t _Scyc
1
Transmit clock t_SCKr
SCK
—
—
200
rise time
ns
1
Transmit clock t_SCKf
SCK
—
—
200
fall time
ns
1
Serial output
t _DSO
SO
—
—
500 Load shown in ns
1
data delay time
figure 54
Serial input data t_SSI
SI
300
—
—
setup time
ns
1
Serial input data t_HSI
SI
300
—
—
hold time
ns
1
Transmit clock t_SCKHD
SCK
1
completion
detect time
—
—
t_cyc/t_subcyc 1, 2, 3
Notes: 1. See figure 53.
2. The transmit clock completion detect time is the high level period after eight transmit clock
pulses have been input. The serial interrupt request flag is not set if the next transmit clock is
input before the transmit clock completion detect time has passed.
3. The unit t_subcyc applies when the MCU is in subactive mode.
t_subcyc = 244.14 µs (32.768-kHz crystal oscillator)
TONEC
TONER
R_L = 100 kΩ
R_L = 100 kΩ
Figure 48 Tone Output Load Circuit
84