HD404618 Datasheet, PDF (52/89 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404618 Series
A write signal input to the serial mode register discontinues the input of the transmit clock to the serial data
register and octal counter. Therefore, if a write is performed during data transmission, the octal counter is
reset to 000 to stop transmission, and at the same time, the serial interrupt request flag is set.
Write operations are valid from the second instruction execution cycle, so the STS instruction must be
executed after at least two cycles have been executed. The serial mode register is initialized to $0 by MCU
reset.
Table 25 Serial Mode Register
SMR
Bit 3
0
1
R0₀/SCK Pin
R0₀ port input/output pin
SCK input/output pin
SMR
Bit 2
0
0
0
0
1
1
1
1
Bit 1
0
0
1
1
0
0
1
1
Bit 0
0
1
0
1
0
1
0
1
Transmit Clock
R0₀/SCK Pin
Clock Source
SCK output
SCK output
SCK output
SCK output
SCK output
SCK output
SCK output
SCK input
Prescaler
Prescaler
Prescaler
Prescaler
Prescaler
Prescaler
System clock
External clock
Prescaler
Division Ratio
÷ 2048
÷ 512
÷ 128
÷ 32
÷8
÷2
—
—
System Clock
Division Ratio
÷ 4096
÷ 1024
÷ 256
÷ 64
÷ 16
÷4
÷1
—
PMRA: $004
PMRA3 PMRA2 PMRA1 PMRA0
SMR: $005
SMR3 SMR2 SMR1 SMR0
Transmit clock selection
R0₀ /SCK pin mode selection
R0₂ /SO pin mode selection
R0₁/SI pin mode selection
Figure 31 Configurations and Functions of the Mode Registers
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