HD66730 Datasheet, PDF (77/131 Pages) Hitachi Semiconductor – Dot-Matrix Liquid Crystal Display Controller/Driver Supporting Japanese Kanji, Korean Font Display

HD66730/HD66731
RAM Data Register (R9)
This register (Figure 16) stores 8-bit data that is written to or read from the DDRAM, CGRAM, or
SEGRAM at the address indicated by the RAM address counter (RAC). The RAM selection bit (RM1/0)
selects the RAM (DDRAM, CGRAM, SEGRAM). After the said RAM is accessed, RAM address is
automatically incremented (decremented) by 1 according to the I/D bit.
Note that RAM selection bits (RM1/0) and RAM address register (R8) must be set before reading. If not,
the first data read is invalid. If read instructions continue to be executed, however, data will be read
correctly from the second read.
Test Register (RF)
This is a test register (Figure 17) and must be set to H'00 at all times. This register is automatically cleared
(H'00) by reset input; however, it must be cleared by software after power-on if the reset pin is not used.
R/W RS DB7
DB0
0/1 1 RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0
Figure 16 RAM Data Register
R/W RS DB7
DB0
01000 00000
Figure 17 Test Register
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