HD66730 Datasheet, PDF (70/131 Pages) Hitachi Semiconductor – Dot-Matrix Liquid Crystal Display Controller/Driver Supporting Japanese Kanji, Korean Font Display

HD66730/HD66731
Function Set Register (R1)
The function set register (Figure 7) includes bits BST, EXT2, EXT1, DT1, DT0, and DCL.
BST: When BST is 1, the booster starts to operate. When the LCD voltage is external, set BST to 0 to stop
operation of the internal booster. In addition, the consumption current can be suppressed by stopping the
booster when entering standby mode without display.
EXT2/1: Extends the common driver and segment driver of HD66730. Set EXT2 to 1 to extend the driver
to the common side if the duty ratio is 1/40 or 1/53. Extend the driver to the segment side by setting EXT1
to 1 when displaying 7 or more digits (of full size) in the horizontal direction. DDRAM capacity is 80
bytes. When the HD66731, these EXT2/1 bits must be set to 1.
DT1/0: Selects the duty ratio of the LCD (Table 11). Although this bit can be set separately from the
display line designation (NL1/0), the duty ratio must be selected so that it will be smaller than the number
of display lines.
DCL: When DCL is 1, the display is cleared by writing the code for half-size space (H'A0) into all
DDRAM addresses. Then H'00 is written into the RAM address counter (RAR) and the DDRAM is
selected. The character code for character code H'A0 must be a blank pattern when rewriting HCGROM
used for half-size characters.
Cursor Control Register (R2)
The cursor control register includes bits CHM, C, CM1, and CM0.
CHM: When CHM is set to 1, DDRAM is selected, the RAM address counter (RAR) is set to 0, and the
cursor home instruction is executed. The contents of DDRAM do not change. The cursor or blinking moves
to the left edge of the display (the left edge of the first line if two lines are displayed).
C: When C = 1, cursor display is turned on. The cursor is displayed at the position corresponding to the
count value of the RAM address counter (RAR). To set data in the RAR, set the index register (IDR) to
1000 to select it, and modify the data in the RAR. Note that the RAM address counter (RAR) automatically
increments (decrements) when the RAM is accessed, and the cursor will move accordingly.
CM1/0: Selects cursor display mode (Table 12 and Figure 9). The blinking frequency (cycle) of the blink
cursor and the white/black inverted cursor has 64 frames.
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