HD66730 Datasheet, PDF (66/131 Pages) Hitachi Semiconductor – Dot-Matrix Liquid Crystal Display Controller/Driver Supporting Japanese Kanji, Korean Font Display

HD66730/HD66731
Register Functions
Outline
Data can be written from the MPU to the internal control registers and internal RAM of the HD66730/1 via
an 8-bit bus interface or a serial interface. There are five types of internal control registers, as follows
(details are described later):
• Index register: Selects and designates which control register the MPU is to access
• Status register: Indicates the internal state
• Control registers: Designates display control
• RAM address register: Sets an address for accessing the various RAMs
• RAM data register: Receives and transmits data to and from the various RAMs
Table 17 shows the instruction list and the number of execution cycles of each instruction after performing
register setting. Instructions that perform data transfer with the RAM data register tend to be used the most.
However, auto-incrementation by 1 (or auto decrementation by 1) of internal HD66730/1 RAM addresses
after each data write can lighten the program load on the MPU. Note that when an instruction is being
executed (internal operations are being performed), only the busy flag in the status register can be read.
Since the busy flag is 1 during execution, the MPU should check this value before accessing a register.
When accessing a register without checking the busy flag, an interval longer than the instruction execution
time is needed before the next access. Refer to Table 17 Instruction Registers, for instruction execution
times.
When rewriting DDRAM, character display will momentarily breakdown if the data (character codes) that
is being rewritten is also being read by the system for display. For this reason, check the display read line
position (NF) and the display read raster-row position (LF) in the status register (SR), and rewrite a
DDRAM line that is not being read and displayed.
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