HD66503 Datasheet, PDF (7/27 Pages) Hitachi Semiconductor – (240-Channel Common Driver with Internal LCD Timing Circuit)

Table 1
M/$
H
L
M/$ Signal Status
Mode
Master
Slave
LCD Timing Generator
1/120 or 1/240 duty cycle control
Stop
HD66503
CL1, FLM, M,   Input/Output State
Output
Input
Table 2 MSW0 to MSW5 Signals Status
Number
of Lines MWS5
0
0
1
0
2
0
3 to 63 0 to 1
MWS4
0
0
0
0 to 1
MWS3
0
0
0
0 to 1
MWS2
0
0
0
0 to 1
MWS1
0
0
1
1 to 1
MWS0
0
1
0
1 to 1
Line Alternating
Waveform
Pin M State
—
Input
Disable
Output
2-line alternation
3-line alternation to
63-line alternation
Table 3
Mode
Master
Slave
MEOR Signal Status
MEOR
H
L
L
Types of Alternating Waveforms Output by Pin M
Line alternating waveform ⊕ frame alternating waveform
Line alternating waveform
—
Table 4 Power Supply Conditions
Item
Symbol
Min
Typ
Max
Unit
Reset time
t_reset
1.0
—
Rise time
t_r
—
—
—
µs
200
ns
Table 5
Mode
Master
Slave
FLM Status Control
DUTY
H
L
H
SHL
H
L
H
L
H
L
Shift Direction of First Line Marker
X240 → X1
X1 → X240
X120 → X1, X240 → X121
X1 → X120, X121 → X240
X240 → X1
X1 → X240
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