HD66503 Datasheet, PDF (16/27 Pages) Hitachi Semiconductor – (240-Channel Common Driver with Internal LCD Timing Circuit)

HD66503
Example of System Configuration (2)
Figure 12 shows a system configuration for a 240 × 320-dot LCD panel using segment driver HD66520
with internal bit-map RAM. Refer to Timing Chart (1) for details.
240
seg1
seg2
LCD
seg159
seg160
seg161
seg162
seg319
seg320 _{Line scan direction}
V_CC
X1, X2, X3, ……… X240
3 _{FLM, CL1, M}
/
1
/
DOC
LCD driver
HD66503
DOC
LCD display timing control circuit
DISPOFF
CR
R
C
DUTY SHL M/S
/ MWS0 to 5
6
/ MEOR
1
/
1
RESET
V_CC
16
/
8
/
3
/
A0 to A15
DB0 to DB7
CS, WE, OE
V1, V2, V5, V6
V1, V2, V3, V4
1
DISPOFF
/
Power supply circuit
Figure 12 System Configuration (2)
942