HD66503 Datasheet, PDF (10/27 Pages) Hitachi Semiconductor – (240-Channel Common Driver with Internal LCD Timing Circuit)

HD66503
5. Display Off Control Circuit: Controls display-off function by using external display off signal
',636 and automatic display off signal FLMM generated by the liquid crystal timing generator.
Automatic display off signal FLMM is an internal signal that is used to turn off the display in four
frames after signal reset is released. As a result, it is possible to turn off display using the display off
signal that is sent randomly from an external LSI and automatically prevent incorrect display after
reset release.
6. Bidirectional Shift Register: This is a 240-bit bidirectional shift register. This register can change the
shift direction using signal SHL. During master mode, the scan signal of the common driver can be
generated by sequentially shifting first line marker signal FLM generated internally. During slave
mode, a scan signal is generated by sequentially shifting first line marker signal FLM input from pin
FLM.
7. Level Shifter: Boosts the logic signal to a high voltage signal for the LCD.
8. LCD Drive Circuit: One of the LCD levels V1, V2, V5, and V6 are selected and output via pin X
according to the combination of the data in the bidirectional shift register and signal M.
Table 6 Output Level of LCD Circuit
Data in the Shift Register
M
1
1
0
1
1
0
0
0
Output Level
V2
V6
V1
V5
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