HD66712 Datasheet, PDF (63/88 Pages) Hitachi Semiconductor – Dot-Matrix Liquid Crystal Display Controller/Driver

HD66712U
Table 17 4-Bit Operation, 24-Digit × 1-Line Display Example with Internal Reset
Step
Instruction
: No. RS R/ DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display
Operation
1 Power supply on (the HD66712 is initialized by
the internal reset circuit)
Initialized. No display.
2 Function set
0 0 0 0 1 0 ————
——————————
Sets to 4-bit operation. Clear bit
2. In this case, operation is
handled as 8 bits by
initialization. *¹
3 Function set
0 0 0 0 1 0 ————
0 0 0 1 0 0 ————
Sets 4-bit operation and
selects1-line display. Clear BE,
LP bits. 4-bit operation starts
from this step.
4 Function set
0 0 0 0 1 0 ————
0 0 0 0 * * ————
Sets 4-bit operation and
selects1 line display. Clear bit 2
(RE).
5 Return home
0 0 0 0 0 0 ————
0 0 0 0 1 0 ————
Returns both display and cursor
to the original position (address
0).
6 Display on/off control
_
0 0 0 0 0 0 ————
0 0 1 1 1 0 ————
Turns on display and cursor.
Entire display is in space mode
because of initialization.
7 Entry mode set
0
00
00
0 ————
_
0 0 0 1 1 0 ————
Sets mode to increment the
address by one and to shift the
cursor to the right at the time of
write to the DD/CGRAM.
Display is not shifted.
8 Write data to CGRAM/DDRAM
H_
1 0 0 1 0 0 ————
1 0 1 0 0 0 ————
Writes H.
DDRAM has already been
selected by initialization.
9
Note:
·
·
Based on 8-bit operation after
·
·
this instruction
·
·
·
·
·
·
The control is the same as for 8-bit operation beyond step #8.
1. When DB3 to DB0 pins are open in 4-bit mode, the RE, BE, LP bits are set to “1” at step #2.
So, these bits are clear to “0” at step #3.
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