HD66712 Datasheet, PDF (29/88 Pages) Hitachi Semiconductor – Dot-Matrix Liquid Crystal Display Controller/Driver

HD66712U
Notes: 1. Character code bits 0 to 2 correspond to CGRAM address bits 3 to 5 (3 bits: 8 types).
2. CGRAM address bits 0 to 2 designate the character pattern line position. The 8th line is the
cursor position and its display is formed by a logical OR with the cursor.
3. The character data is stored with the rightmost character element in bit 0, as shown in the
figure above. Characters of 5 dots in width (FW = 0) are stored in bits 0 to 4, and characters of
6 dots in width (FW = 1) are stored in bits 0 to 5.
4. When the upper four bits (bits 7 to 4) of the character code are 0, CGRAM is selected.
Bit 3 of the character code is invalid (*). Therefore, for example, the character codes (00)H and
(08)H correspond to the same CGRAM address.
5. A set bit in the CGRAM data corresponds to display selection, and 0 to non-selection.
6. When the BE bit of the function set register is 1, pattern blinking control of the lower six bits is
controlled using the upper two bits (bits 7 and 6) in CGRAM.
When bit 7 is 1, of the lower six bits, only those which are set are blinked on the display.
When bit 6 is 1, a bit 4 pattern can be blinked as for a 5-dot font width, and a bit 5 pattern
can be blinked as for a 6-dot font width.
* Indicates no effect.
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