HD66712 Datasheet, PDF (30/88 Pages) Hitachi Semiconductor – Dot-Matrix Liquid Crystal Display Controller/Driver

Table 8 Relationship between SEGRAM Addresses and Display Patterns
HD66712U
SEGRAM
address
A3 A2 A1 A0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
SEGRAM data
a) 5-dot font width
b) 6-dot font width
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
B1 B0 * S1 S2 S3 S4 S5 B1 B0 S1 S2 S3 S4 S5 S6
B1 B0 * S6 S7 S8 S9 S10 B1 B0 S7 S8 S9 S10 S11 S12
B1 B0 * S11 S12 S13 S14 S15 B1 B0 S13 S14 S15 S16 S17 S18
B1 B0 * S16 S17 S18 S19 S20 B1 B0 S19 S20 S21 S22 S23 S24
B1 B0 * S21 S22 S23 S24 S25 B1 B0 S25 S26 S27 S28 S29 S30
B1 B0 * S26 S27 S28 S29 S30 B1 B0 S31 S32 S33 S34 S35 S36
B1 B0 * S31 S32 S33 S34 S35 B1 B0 S37 S38 S39 S40 S41 S42
B1 B0 * S36 S37 S38 S39 S40 B1 B0 S43 S44 S45 S46 S47 S48
B1 B0 * S41 S42 S43 S44 S45 B1 B0 S49 S50 S51 S52 S53 S54
B1 B0 * S46 S47 S48 S49 S50 B1 B0 S55 S56 S57 S58 S59 S60
B1 B0 * S51 S52 S53 S54 S55 B1 B0 S61 S62 S63 S64 S65 S66
B1 B0 * S56 S57 S58 S59 S60 B1 B0 S67 S68 S69 S70 S71 S72
B1 B0 * S61 S62 S63 S64 S65 B1 B0 S73 S74 S75 S76 S77 S78
B1 B0 * S66 S67 S68 S69 S70 B1 B0 S79 S80 S81 S82 S83 S84
B1 B0 * S71 S72 S73 S74 S75 B1 B0 S85 S86 S87 S88 S89 S90
B1 B0 * S76 S77 S78 S79 S80 B1 B0 S91 S92 S93 S94 S95 S96
Blinking control
Pattern on/off
Blinking control
Pattern on/off
Notes: 1. Data set to SEGRAM is output when COM0 and COM17 are selected, as for a 1-line display,
and output when COM0 and COM33 are selected, as for a 2-line or a 4-line display. COM0
and COM17 for a 1-line display and COM0 and COM33 for a 2-line or a 4-line display are the
same signals.
2. S1 to S96 are pin numbers of the segment output driver. S1 is positioned to the left of the
display. When the HD66712 is used by one chip, segments from S1 to S60 are displayed. An
extension driver displays the segments after S61.
3. After S80 output at 5-dot font and S96 output at 6-dot font, S1 output is repeated again.
4. As for a 5-dot font width, lower five bits (D4 to D0) are display on.off information of each
segment. For a 6-dot character width, the lower six bits (D5 to D0) are the display information
for each segment.
5. When the BE bit of the function set register is 1, pattern blinking of the lower six bits is
controlled using the upper two bits (bits 7 and 6) in SEGRAM.
When bit 7 is 1, only a bit set to “1” of the lower six bits is blinked on the display.
When bit 6 is 1, only a bit 4 pattern can be blinked as for a 5-dot font width, and only a bit 5
pattern can be blinked as for 6-dot font width.
6. Bit 5 (D5) is invalid for a 5-dot font width.
7. Set bits in the SEGRAM data correspond to display selection, and zeros to non-selection.
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