HD66712 Datasheet, PDF (60/88 Pages) Hitachi Semiconductor – Dot-Matrix Liquid Crystal Display Controller/Driver

HD66712U
Instruction and Display Correspondence
• 8-bit operation, 24-digit × 1-line display with internal reset
Refer to Table 16 for an example of an 24-digit × 1-line display in 8-bit operation. The HD66712
functions must be set by the function set instruction prior to the display. Since the display data RAM
can store data for 80 characters, a character unit scroll can be performed by a display shift instruction.
A dot unit smooth scroll can also be performed by a horizontal scroll instruction. Since data of display
RAM (DDRAM) is not changed by a display shift instruction, the display can be returned to the first
set display when the return home operation is performed.
• 4-bit operation, 24-digit × 1-line display with internal reset
The program must set all functions prior to the 4-bit operation (see Table 17.) When the power is
turned on, 8-bit operation is automatically selected and the first write is performed as an 8-bit
operation. Since DB0 to DB3 are not connected, a rewrite is then required. However, since one
operation is completed in two accesses for 4-bit operation, a rewrite is needed to set the functions.
Thus, DB4 to DB7 of the function set instruction is written twice.
• 8-bit operation, 24-digit × 2-line display with internal reset
For a 2-line display, the cursor automatically moves from the first to the second line after the 40th
digit of the first line has been written. Thus, if there are only 16 characters in the first line, the
DDRAM address must be again set after the 16th character is completed. (See Table 18.)
The display shift is performed for the first and second lines. If the shift is repeated, the display of the
second line will not move to the first line. The same display will only shift within its own line for the
number of times the shift is repeated.
• 8-bit operation, 12-digit × 4-line display with internal reset
The RE bit must be set by the function set instruction and then the NW bit must be set by an
extension function set instruction. In this case, 4-line display is always performed regardless of the N
bit setting (see Table 19).
In a 4-line display, the cursor automatically moves from the first to the second line after the 20th digit
of the first line has been written. Thus, if there are only 8 characters in the first line, the DDRAM
address must be set again after the 8th character is completed. Display shifts are performed on all
lines simultaneously.
Note: When using the internal reset, the electrical characteristics in the Power Supply Conditions Using
Internal Reset Circuit Table must be satisfied. If not, the HD66712 must be initialized by
instructions. See the section, Initializing by Instruction.
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