MB85R1002_07 Datasheet, PDF (5/15 Pages) Fujitsu Component Limited. – Memory FRAM CMOS 1 M Bit (64 K × 16)

MB85R1002
■ FUNCTION TRUTH TABLE
Mode
CE1 CE2 WE OE LB UB I/O1 to I/O8 I/O9 to I/O16 Supply Current
HXXXXX
Standby Pre-charge
XLXXXX
XXHHXX
High-Z
High-Z
Standby
(ISB)
XXXXHH
Read
LL
Dout
L
H
H
L
L
H
Dout
HL
High-Z
Dout
High-Z
Dout
Read
(Pseudo-SRAM,
OE control*¹)
Write
LL
Dout
L HH
LH
Dout
HL
High-Z
LL
Din
L
H
L
X
L
H
Din
HL
High-Z
Dout
High-Z
Dout
Din
High-Z
Din
Operation
(ICC)
Write
(Pseudo-SRAM,
WE control*²)
LH
LL
HLH
HL
Din
Din
High-Z
Din
High-Z
Din
Notes : L = VIL, H = VIH, X can be either VIL or VIH, High-Z = High Impedance
: Latch address and latch data at falling edge,
: Latch address and latch data at rising edge
*1 : OE control of the Pseudo-SRAM means the valid address at the falling edge of OE to read.
*2 : WE control of the Pseudo-SRAM means the valid address and data at the falling edge of WE to write.
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