MB84VD2008 Datasheet, PDF (4/30 Pages) Fujitsu Component Limited. – 8M (x 16) FLASH MEMORY & 2M (x 16) STATIC RAM

MB84VD2008-10/MB84VD2009-10
s PRODUCT LINE UP
Flash Memory
SRAM
Ordering Part No.
VCC
=
3.0
V
+0.6 V
–0.3 V
Max. Address Access Time (ns)
Max. CE Access Time (ns)
Max. OE Access Time (ns)
MB84VD2008-10/MB84VD2009-10
100
85
100
85
40
45
s BUS OPERATIONS
Operation (1), (3)
CEf
Full Standby
H
H
Output Disable
L
Read from Flash (2)
L
Write to Flash
L
Read from SRAM
H
Write to SRAM
H
Flash Hardware Reset
X
Table 2 User Bus Operations
CEs OE
H
X
H
L
X
H
H
H
L
H
H
L
L
L
X
H
X
WE LBs UBs
X
X
X
H
X
X
X
H
H
H
X
X
H
X
X
L
X
X
L
L
H
H
L
L
H
L
L
L
H
L
L
H
X
X
X
DQ0 to DQ7 DQ8 to DQ15 RESET
HIGH-Z
HIGH-Z
H
HIGH-Z
HIGH-Z
HIGH-Z
HIGH-Z
H
HIGH-Z
HIGH-Z
DOUT
DOUT
H
DIN
DIN
H
DOUT
DOUT
HIGH-Z
DOUT
H
DOUT
HIGH-Z
DIN
DIN
HIGH-Z
DIN
H
DIN
HIGH-Z
HIGH-Z
HIGH-Z
L
Legend: L = VIL, H = VIH, X = VIL or VIH. See DC Characteristics for voltage levels.
Notes: 1. Other operations except for indicated this column are inhibited.
2. WE can be VIL if OE is VIL, OE at VIH initiates the write operations.
3. Do not apply CEf = VIL, CEs = VIL at a time.
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