MB84VD2008 Datasheet, PDF (25/30 Pages) Fujitsu Component Limited. – 8M (x 16) FLASH MEMORY & 2M (x 16) STATIC RAM

MB84VD2008-10/MB84VD2009-10
• Write Cycle (Note 4) (CEs control) (SRAM)
ADDRESSES
tAS
WE
tWC
tWP
tWR
tCW
CES
UB, LB
DOUT
DIN
tBE
tCOE
Note 5
tBW
tODW
tDS
tDH
VALID DATA IN
Note 5
Notes: 2. If CEs goes LOW coincident with or after WE goes LOW, the output will remain at high
impedance.
3. If CEs goes HIGH coincident with or before WE goes HIGH, the output will remain at
high impedance.
4. If OE is HIGH during the write cycle, the outputs will remain at high impedance.
5. Because I/O signals may be in the output state at this Time, input signals of reverse
polarity must not be applied.
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