MB15F63UL Datasheet, PDF (4/36 Pages) Fujitsu Component Limited. – Dual Serial Input PLL Frequency Synthesizer

MB15F63UL
■ PIN DESCRIPTIONS
Pin no. Pin name I/O
Descriptions
1
VPIF
⎯ Charge pump power supply for the IF-PLL
2
DoIF
O Charge pump output for the IF-PLL
3
GND
⎯ Ground pin
4
SW
O Open-drain switch pin for changing over the high-speed mode filter
5
DoRF O Charge pump output for the RF-PLL
6
VPRF ⎯ Power supply for the RF-PLL charge pump
Lock detect signal output (LD) /phase comparator monitoring output (fout) pin.
7
LD/fout O The output signal is selected by LDS bit in a serial data.
LDS bit = “H” : outputs fout signal/LDS bit = “L” : outputs LD signal
Power saving mode control for the RF-PLL section. This pin must be set at “L” when
8
PSRF
I the power supply is started up. (Open is prohibited. )
PS = “H” : Normal mode/PS = “L” : Power saving mode
9
GND
⎯ Ground pin
10
XfinRF
I
Prescaler complimentary input pin for the RF-PLL section.
This pin should be grounded via a capacitor.
11
finRF
I
Prescaler input pin for the RF-PLL.
Connection to an external VCO should be via AC coupling.
12
VccRF ⎯ Power supply pin for the RF-PLL
Load enable signal input pin (with the schmitt trigger circuit)
13
LE
I When LE is set “H”, data in the shift register is transferred to the corresponding latch
according to the control bit in a serial data.
Serial data input pin (with the schmitt trigger circuit)
14
Data
I Data is transferred to the corresponding latch (IF-ref. counter, IF-prog. counter,
RF-ref. counter, RF-prog. counter) according to the control bit in a serial data.
15
CLK
I
Clock input pin for the 29-bit shift register (with the schmitt trigger circuit)
One bit data is shifted into the shift register on a rising edge of the clock.
16
VccIF ⎯ Power supply pin for the IF-PLL
17
OSCin
I
The programmable reference divider input pin. TCXO should be connected with an
AC coupling capacitor.
18
XfinIF
I
Prescaler complimentary input for the IF-PLL section.
This pin should be grounded via a capacitor.
19
finIF
I
Prescaler input pin for the IF-PLL.
Connection to an external VCO should be AC coupling.
Power saving mode control pin for the IF-PLL section. This pin must be set at “L”
20
PSIF
I when the power supply is started up. (Open is prohibited.)
PS bit = “H” : Normal mode/PS bit = “L” : Power saving mode
4