MB15F63UL Datasheet, PDF (31/36 Pages) Fujitsu Component Limited. – Dual Serial Input PLL Frequency Synthesizer

MB15F63UL
3. Excessive spurious signals are generated when setting a binary division such as F/Q = 1/2, 1/4, 1/8…
If it is difficult to reduce the excess level, value F can be shifted to the acceptable range of frequency differences
to reduce it.
Example:
Spurious noise is generated on the entire floor when F = 524288 (F/Q = 1/2).
Spurious noise is generated on the entire floor when F = 262144 (F/Q = 1/4).
The following section shows examples of spurious waveforms generated in the above cases as well as
examples of waveforms when 5 and 10 are added to value F.
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