MC68HC05SR3D Datasheet, PDF (88/96 Pages) Freescale Semiconductor, Inc – Microcontrollers

A.2
Modes of Operation
The MC68HC705SR3 has two modes of operation – user mode and EPROM bootstrap mode.
Table A-1 shows the conditions required to enter each mode on the rising edge of RESET.
Table A-1 MC68HC705SR3 Operating Mode Entry Conditions
RESET
5V
V_TST = 2 × V_DD
V_PP
V_SS to V_DD
V_TST
PB1
V_SS to V_DD
V_DD
MODE
USER
BOOTSTRAP
A.3
User Mode
The normal operating mode of the MC68HC705SR3 is the user mode. User mode will be entered
on the rising edge of RESET when the V_PP and PB1 pins are between V_SS and V_DD.
Warning: In the MC68HC705SR3, all vectors are fetched from EPROM in user mode; therefore,
the EPROM must be programmed (via the bootstrap mode) before the device is
powered up in user mode.
A.4
Bootstrap Mode
The bootstrap mode is provided as a mean of self-programming MC68HC705SR3 EPROM with
minimal circuitry, and can only run in the crystal oscillator mode. Bootstrap mode will be entered
on the rising edge of RESET when the V_PP pin is at V_TST (2×V_DD) and PB1 pin is at V_DD. Once
in the bootstrap mode, PB1 can then be used for other purposes. After entering the bootstrap
mode, CPU branches to the bootstrap program and carries out the EPROM programming routine.
The user EPROM consists of 3840 bytes, from location $1000 to $1EFF.
This program handles copying of user code from an external EPROM into the on-chip EPROM.
The bootstrap function does not have to be done from an external EPROM, but it may be done
from a host.
A
The user code must be a one-to-one correspondence with the internal EPROM addresses.
Freescale
A-2
MC68HC705SR3
TPG
MC68HC05SR3