MC68HC05SR3D Datasheet, PDF (75/96 Pages) Freescale Semiconductor, Inc – Microcontrollers

Table 10-2 Self-Check Report
D4
D3
D2
D1
REMARKS
Flashing
O.K. (self-check is on-going)
1
1
1
1
Bad port A
1
1
1
0
Bad port B
1
1
0
1
Bad port C
1
1
0
0
Bad port D
1
0
1
1
Bad RAM
1
0
1
0
Bad ROM
1
0
0
0
Bad SWI
0
1
1
1
Bad IRQ
1=LED on, 0=LED off
10.3
Bootstrap Mode
The Bootstrap mode is provided in the EPROM part (MC68HC705SR3) as a mean of
self-programming its EPROM with minimal circuitry. Bootstrap mode will be entered on the rising
edge of RESET when the V_PP pin is at V_TST (2×V_DD) and PB1 pin is at V_DD. Once in the bootstrap
mode, PB1 can then be used for other purposes. After entering the bootstrap mode, CPU
branches to the bootstrap program and carries out the EPROM programming routine. The user
EPROM consists of 3840 bytes, from location $1000 to $1EFF.
Refer to Appendix A for further details on MC68HC705SR3.
10
MC68HC05SR3
OPERATING MODES
TPG
Freescale
10-3