MC68HC05SR3D Datasheet, PDF(52/96 Page) Freescale Semiconductor, Inc

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MC68HC05SR3D Datasheet, PDF (52/96 Pages) Freescale Semiconductor, Inc – Microcontrollers

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7.1

ADC Operation

As shown in Figure 7-1, the ADC consists of an analog multiplexer, an 8-bit digital to analog

capacitor array, a comparator and a successive approximation register (SAR).

There are eight options that can be selected by the multiplexer; the AN0 to AN3 input pins, VRH,

VRL, (VRH+VRL)/4, or (VRH+VRL)/2. Selection is done via the CHx bits in the ADC Status and

Control Register. AN0 to AN3 are input points for ADC conversion operations; the others are

reference points which can be used for test purposes. The converter uses VRH and VRL as

reference voltages. An input voltage equal to or greater than VRH converts to $FF. An input voltage

equal to or less than VRL, but greater than VSS, converts to $00. Maximum and minimum ratings

must not be exceeded. Each analog input source should use VRH as the supply voltage and should

be referenced to VRL for the ratiometric conversions. To maintain full accuracy of the ADC, the

following should be noted:

1) VRH should be equal to or less than VCC;

2) VRL should be equal to or greater than VSS but less than maximum

specifications; and

3) VRHâVRL should be equal to or greater than 4 Volts.

The ADC reference inputs (VRH and VRL) are applied to a precision internal digital to analog

converter. Control logic drives this D/A converter and the analog output is successively compared

with the selected analog input sampled at the beginning of the conversion. The conversion is

monotonic with no missing codes.

The result of each successive comparison is stored in the successive approximation register

(SAR) and, when the conversion is complete, the contents of the SAR are transferred to the

read-only ADC Data Register ($0F), and the conversion complete flag, COCO, is set in the

ADC Status and Control Register ($0E).

Warning: Any write to the ADC Status and Control Register will abort the current conversion,

reset the conversion complete flag (COCO) and a new conversion starts on the

selected channel.

At power-on or external reset, both the ADRC and ADON bits are cleared, thus the ADC is

disabled.

Freescale

7-2

ANALOG TO DIGITAL CONVERTER

TPG

MC68HC05SR3

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