MC68332ACEH20 Datasheet, PDF (71/88 Pages) Freescale Semiconductor, Inc – 32-Bit Modular Microcontroller

Freescale Semiconductor, Inc.
6.5 QSPI Submodule
The QSPI submodule communicates with external devices through a synchronous serial bus. The QSPI
is fully compatible with the serial peripheral interface (SPI) systems found on other Motorola products.
A block diagram of the QSPI is shown below.
QUEUE CONTROL
BLOCK
QUEUE
4
POINTER
COMPARATOR
END QUEUE
POINTER
CONTROL
LOGIC
STATUS
REGISTER
CONTROL
REGISTERS
DELAY
COUNTER
DONE
ADDRESS
REGISTER
4
4
CHIP SELECT
4 COMMAND
80-BYTE
QSPI RAM
PROGRAMMABLE
LOGIC ARRAY
MSB
LSB
M
8/16-BIT SHIFT REGISTER
S
Rx/Tx DATA REGISTER
M
S
3
BAUD RATE
GENERATOR
MOSI
MISO
PCS0/SS
PCS [3:1]
SCK
Figure 14 QSPI Block Diagram
QSPI BLOCK
6.5.1 QSPI Pins
Seven pins are associated with the QSPI. When not needed for a QSPI application, they can be con-
figured as general-purpose I/O pins. The PCS0/SS pin can function as a peripheral chip select output,
slave select input, or general-purpose I/O. Refer to the following table for QSPI input and output pins
and their functions.
MC68332
MC68332TS/D
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MOTOROLA
71