MC68332ACEH20 Datasheet, PDF (65/88 Pages) Freescale Semiconductor, Inc – 32-Bit Modular Microcontroller

Freescale Semiconductor, Inc.
6.2 Address Map
The “Access” column in the QSM address map below indicates which registers are accessible only at
the supervisor privilege level and which can be assigned to either the supervisor or user privilege level,
according to the value of the SUPV bit in the QSMCR.
Table 24 QSM Address Map
Access
S
S
S
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
Address 15
87
0
$YFFC00
QSM MODULE CONFIGURATION (QSMCR)
$YFFC02
QSM TEST (QTEST)
$YFFC04 QSM INTERRUPT LEVEL (QILR) QSM INTERRUPT VECTOR (QIVR)
$YFFC06
NOT USED
$YFFC08
SCI CONTROL 0 (SCCR0)
$YFFC0A
SCI CONTROL 1 (SCCR1)
$YFFC0C
SCI STATUS (SCSR)
$YFFC0E
SCI DATA (SCDR)
$YFFC10
NOT USED
$YFFC12
NOT USED
$YFFC14
NOT USED
PQS DATA (PORTQS)
$YFFC16 PQS PIN ASSIGNMENT (PQSPAR) PQS DATA DIRECTION (DDRQS)
$YFFC18
SPI CONTROL 0 (SPCR0)
$YFFC1A
SPI CONTROL 1 (SPCR1)
$YFFC1C
SPI CONTROL 2 (SPCR2)
$YFFC1E
SPI CONTROL 3 (SPCR3)
SPI STATUS (SPSR)
$YFFC20–
$YFFCFF
NOT USED
$YFFD00–
$YFFD1F
RECEIVE RAM (RR[0:F])
$YFFD20–
$YFFD3F
TRANSMIT RAM (TR[0:F])
$YFFD40–
$YFFD4F
COMMAND RAM (CR[0:F])
Y = M111, where M is the logic state of the MM bit in the SIMCR.
MC68332
MC68332TS/D
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