MC68332ACEH20 Datasheet, PDF (20/88 Pages) Freescale Semiconductor, Inc – 32-Bit Modular Microcontroller

Freescale Semiconductor, Inc.
3.2.2 System Protection Control Register
The system protection control register controls system monitor functions, software watchdog clock
prescaling, and bus monitor timing. This register can be written only once following power-on or reset,
but can be read at any time.
SYPCR —System Protection Control Register
$YFFA21
15
RESET:
NOT USED
8
7
6
SWE SWP
5
4
SWT
3
2
HME BME
1
0
BMT
1 MODCLK 0
0
0
0
0
0
SWE — Software Watchdog Enable
0 = Software watchdog disabled
1 = Software watchdog enabled
SWP — Software Watchdog Prescale
This bit controls the value of the software watchdog prescaler.
0 = Software watchdog clock not prescaled
1 = Software watchdog clock prescaled by 512
SWT[1:0] — Software Watchdog Timing
This field selects the divide ratio used to establish software watchdog time-out period. The following ta-
ble gives the ratio for each combination of SWP and SWT bits.
SWP
0
0
0
0
1
1
1
1
SWT
00
01
10
11
00
01
10
11
Ratio
2⁹
2¹¹
2¹³
2¹⁵
2¹⁸
2²⁰
2²²
2²⁴
HME — Halt Monitor Enable
0 = Disable halt monitor function
1 = Enable halt monitor function
BME — Bus Monitor External Enable
0 = Disable bus monitor function for an internal to external bus cycle.
1 = Enable bus monitor function for an internal to external bus cycle.
BMT[1:0] — Bus Monitor Timing
This field selects a bus monitor time-out period as shown in the following table.
BMT
00
01
10
11
Bus Monitor Time-out Period
64 System Clocks
32 System Clocks
16 System Clocks
8 System Clocks
MOTOROLA
20
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MC68332
MC68332TS/D