MC68332ACEH20 Datasheet, PDF (48/88 Pages) Freescale Semiconductor, Inc – 32-Bit Modular Microcontroller

Freescale Semiconductor, Inc.
Instruction
DBcc
DIVS/DIVU
DIVSL/DIVUL
EOR
EORI
EORI to CCR
EORI to SR¹
EXG
EXT
EXTB
ILLEGAL
JMP
JSR
LEA
LINK
LPSTOP¹
LSL
LSR
MOVE
MOVEA
MOVEA¹
MOVE from CCR
MOVE to CCR
MOVE from SR¹
MOVE to SR¹
MOVE USP¹
MOVEC¹
MOVEM
MOVEP
MOVEQ
Table 20 Instruction Set Summary(Continued)
Syntax
Dn, label
<ea>, Dn
<ea>, Dr : Dq
<ea>, Dq
<ea>, Dr : Dq
Dn, <ea>
# <data>, <ea>
# <data>, CCR
# <data>, SR
Rn, Rn
Dn
Dn
Dn
none
Í
Í
<ea>, An
An, # d
# <data>
Dn, Dn
# <data>, Dn
Í
Dn, Dn
#<data>, Dn
Í
<ea>, <ea>
<ea>, An
USP, An
An, USP
CCR, <ea>
<ea>, CCR
SR, <ea>
<ea>, SR
USP, An
An, USP
Rc, Rn
Rn, Rc
list, <ea>
<ea>, list
Dn, (d16, An)
Operand Size
16
32/16 ⇒ 16 : 16
64/32 ⇒ 32 : 32
32/32 ⇒ 32
32/32 ⇒ 32 : 32
8, 16, 32
8, 16, 32
8
16
32
8 ⇒ 16
16 ⇒ 32
8 ⇒ 32
none
none
none
32
16, 32
16
8, 16, 32
8, 16, 32
16
8, 16, 32
8, 16, 32
16
8, 16, 32
16, 32 ⇒ 32
32
32
16
16
16
16
32
32
32
32
16, 32
16, 32 ⇒ 32
16, 32
Operation
If condition false, then Dn − 1 ⇒ PC;
if Dn ≠ (− 1), then PC + d ⇒ PC
Destination / Source ⇒ Destination
(signed or unsigned)
Destination / Source ⇒ Destination
(signed or unsigned)
Source ⊕ Destination ⇒ Destination
Data ⊕ Destination ⇒ Destination
Source ⊕ CCR ⇒ CCR
Source ⊕ SR ⇒ SR
Rn ⇒ Rn
Sign extended Destination ⇒ Destination
Sign extended Destination ⇒ Destination
SSP − 2 ⇒ SSP; vector offset ⇒ (SSP);
SSP − 4 ⇒ SSP; PC ⇒ (SSP);
SSP − 2 ⇒ SSP; SR ⇒ (SSP);
Illegal instruction vector address ⇒ PC
Destination ⇒ PC
SP − 4 ⇒ SP; PC ⇒ (SP); destination ⇒ PC
<ea> ⇒ An
SP − 4 ⇒ SP, An ⇒ (SP); SP ⇒ An, SP + d ⇒ SP
Data ⇒ SR; interrupt mask ⇒ EBI; STOP
X/C
0
0
X/C
Source ⇒ Destination
Source ⇒ Destination
USP ⇒ An
An ⇒ USP
CCR ⇒ Destination
Source ⇒ CCR
SR ⇒ Destination
Source ⇒ SR
USP ⇒ An
An ⇒ USP
Rc ⇒ Rn
Rn ⇒ Rc
Listed registers ⇒ Destination
Source ⇒ Listed registers
Dn [31 : 24] ⇒ (An + d); Dn [23 : 16] ⇒ (An + d + 2);
Dn [15 : 8] ⇒ (An + d + 4); Dn [7 : 0] ⇒ (An + d + 6)
(d16, An), Dn
#<data>, Dn
8 ⇒ 32
(An + d) ⇒ Dn [31 : 24]; (An + d + 2) ⇒ Dn [23 : 16];
(An + d + 4) ⇒ Dn [15 : 8]; (An + d + 6) ⇒ Dn [7 : 0]
Immediate data ⇒ Destination
MOTOROLA
48
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