K20P121M100SF2 Datasheet, PDF (64/68 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Pinout
121 Pin Name
MAP
BGA
• PTA17
Default
ALT0
ALT1
ADC1_SE17 ADC1_SE17 PTA17
• VDD
• VSS
• PTA18
VDD
VSS
EXTAL
VDD
VSS
EXTAL
PTA18
• PTA19
XTAL
XTAL
PTA19
• RESET_b
• PTA24
• PTA25
• PTA26
• PTA27
• PTA28
• PTA29
• PTB0
• PTB1
• PTB2
• PTB3
• PTB6
• PTB7
• PTB8
RESET_b RESET_b
DISABLED
PTA24
DISABLED
PTA25
DISABLED
PTA26
DISABLED
PTA27
DISABLED
PTA28
DISABLED
PTA29
/ADC0_SE8/ /ADC0_SE8/ PTB0
ADC1_SE8/ ADC1_SE8/
TSI0_CH0 TSI0_CH0
/ADC0_SE9/ /ADC0_SE9/ PTB1
ADC1_SE9/ ADC1_SE9/
TSI0_CH6 TSI0_CH6
/
/
PTB2
ADC0_SE12/ ADC0_SE12/
TSI0_CH7 TSI0_CH7
/
/
PTB3
ADC0_SE13/ ADC0_SE13/
TSI0_CH8 TSI0_CH8
/ADC1_SE12 /ADC1_SE12 PTB6
/ADC1_SE13 /ADC1_SE13 PTB7
PTB8
• PTB9
PTB9
• PTB10
• PTB11
• VSS
• VDD
• PTB16
• PTB17
/ADC1_SE14 /ADC1_SE14 PTB10
/ADC1_SE15 /ADC1_SE15 PTB11
VSS
VSS
VDD
VDD
/TSI0_CH9 /TSI0_CH9 PTB16
/TSI0_CH10 /TSI0_CH10 PTB17
• PTB18
/TSI0_CH11 /TSI0_CH11 PTB18
• PTB19
/TSI0_CH12 /TSI0_CH12 PTB19
• PTB20
PTB20
ALT2
ALT3
ALT4
ALT5
SPI0_SIN UART0_RTS
_b
FTM0_FLT2
FTM1_FLT0
FTM_CLKIN
0
FTM_CLKIN
1
I2C0_SCL FTM1_CH0
I2C0_SDA FTM1_CH1
I2C0_SCL UART0_RTS
_b
I2C0_SDA UART0_CTS
_b
SPI1_PCS1
SPI1_PCS0
SPI1_SCK
UART3_RTS
_b
UART3_CTS
_b
UART3_RX
UART3_TX
FB_AD23
FB_AD22
FB_AD21
FB_AD20
FB_AD19
FB_AD18
SPI1_SOUT UART0_RX
SPI1_SIN UART0_TX
FB_AD17
FB_AD16
CAN0_TX
CAN0_RX
FTM2_CH0
FTM2_CH1
I2S0_TX_BC FB_AD15
LK
I2S0_TX_FS FB_OE_b
SPI2_PCS0
FB_AD31
ALT6
ALT7
I2S0_MCLK I2S0_CLKIN
LPT0_ALT1
FB_A29
FB_A28
FB_A27
FB_A26
FB_A25
FB_A24
FTM1_QD_P
HA
FTM1_QD_P
HB
FTM0_FLT3
FTM0_FLT0
FTM0_FLT1
FTM0_FLT2
EWM_IN
EWM_OUT_
b
FTM2_QD_P
HA
FTM2_QD_P
HB
CMP0_OUT
EzPort
K20 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
64
Preliminary
Freescale Semiconductor, Inc.