K20P121M100SF2 Datasheet, PDF (63/68 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Pinout
121 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
MAP
BGA
• VREFH
VREFH
VREFH
• VREFL
VREFL
VREFL
• VSSA
VSSA
VSSA
• VREF_OUT/ VREF_OUT VREF_OUT/
CMP1_IN5/
CMP1_IN5/
CMP0_IN5/
CMP0_IN5/
ADC1_SE18
ADC1_SE18
• DAC0_OUT/ DAC0_OUT DAC0_OUT/
CMP1_IN3/
CMP1_IN3/
ADC0_SE23
ADC0_SE23
• /CMP2_IN3/
ADC1_SE23
/CMP2_IN3/
ADC1_SE23
• XTAL32 XTAL32 XTAL32
• EXTAL32 EXTAL32 EXTAL32
• VBAT
VBAT
VBAT
• PTE24
ADC0_SE17 ADC0_SE17 PTE24
CAN1_TX UART4_TX
EWM_OUT_
b
• PTE25
ADC0_SE18 ADC0_SE18 PTE25
CAN1_RX UART4_RX
EWM_IN
• PTE26
DISABLED
PTE26
UART4_CTS
_b
RTC_CLKO USB_CLKIN
UT
• PTA0
JTAG_TCLK/ TSI0_CH1 PTA0
SWD_CLK/
EZP_CLK
UART0_CTS FTM0_CH5
_b
JTAG_TCLK/ EZP_CLK
SWD_CLK
• PTA1
JTAG_TDI/ TSI0_CH2 PTA1
EZP_DI
UART0_RX FTM0_CH6
JTAG_TDI EZP_DI
• PTA2
JTAG_TDO/ TSI0_CH3 PTA2
TRACE_SW
O/EZP_DO
UART0_TX FTM0_CH7
JTAG_TDO/ EZP_DO
TRACE_SW
O
• PTA3
JTAG_TMS/ TSI0_CH4 PTA3
SWD_DIO
UART0_RTS FTM0_CH0
_b
JTAG_TMS/
SWD_DIO
• PTA4
NMI_b/
TSI0_CH5 PTA4
EZP_CS_b
FTM0_CH1
NMI_b
EZP_CS_b
• PTA5
DISABLED
PTA5
FTM0_CH2
CMP2_OUT I2S0_RX_BC JTAG_TRST
LK
• PTA10
DISABLED
PTA10
FTM2_CH0
FTM2_QD_P TRACE_D0
HA
• PTA11
DISABLED
PTA11
FTM2_CH1
FTM2_QD_P
HB
• PTA12
CMP2_IN0 CMP2_IN0 PTA12
CAN0_TX FTM1_CH0
I2S0_TXD FTM1_QD_P
HA
• PTA13
CMP2_IN1 CMP2_IN1 PTA13
CAN0_RX FTM1_CH1
I2S0_TX_FS FTM1_QD_P
HB
• PTA14
DISABLED
PTA14
SPI0_PCS0 UART0_TX
I2S0_TX_BC
LK
• PTA15
DISABLED
PTA15
SPI0_SCK UART0_RX
I2S0_RXD
• PTA16
DISABLED
PTA16
SPI0_SOUT UART0_CTS
_b
I2S0_RX_FS
K20 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
63