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K20P121M100SF2 Datasheet, PDF (34/68 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz | |||
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Peripheral operating requirements and behaviors
Figure 9. EEPROM backup writes to FlexRAM
6.4.2 EzPort Switching Specifications
Table 22. EzPort switching specifications
Num
EP1
EP1a
Description
Operating voltage
EZP_CK frequency of operation (all commands except
READ)
EZP_CK frequency of operation (READ command)
Min.
2.7
â
â
EP2
EZP_CS negation to next EZP_CS assertion
EP3
EZP_CS input valid to EZP_CK high (setup)
EP4
EZP_CK high to EZP_CS input invalid (hold)
EP5
EZP_D input valid to EZP_CK high (setup)
EP6
EZP_CK high to EZP_D input invalid (hold)
EP7
EZP_CK low to EZP_Q output valid (setup)
EP8
EZP_CK low to EZP_Q output invalid (hold)
EP9
EZP_CS negation to EZP_Q tri-state
2 x tEZP_CK
5
5
2
5
â
0
â
Max.
3.6
fSYS/2
fSYS/8
â
â
â
â
â
12
â
12
Unit
V
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
K20 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
34
Preliminary
Freescale Semiconductor, Inc.
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