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MC908AP8CFBE Datasheet, PDF (49/324 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Chapter 3
Configuration & Mask Option Registers (CONFIG & MOR)
3.1 Introduction
This section describes the configuration registers, CONFIG1 and CONFIG2; and the mask option
register, MOR.
The configuration registers enable or disable these options:
⢠Computer operating properly module (COP)
⢠COP timeout period (218 â 24 or 213 â 24 ICLK cycles)
⢠Low-voltage inhibit (LVI) on VDD
⢠LVI on VREG
⢠LVI module reset
⢠LVI module in stop mode
⢠STOP instruction
⢠Stop mode recovery time (32 ICLK or 4096 ICLK cycles)
⢠Oscillator (internal, RC, and crystal) during stop mode
⢠Serial communications interface clock source (CGMXCLK or fBUS)
The mask option register selects one of the following oscillator options:
⢠Internal oscillator
⢠RC oscillator
⢠Crystal oscillator
Addr.
Register Name
Bit 7
6
5
Conï¬guration Register 2 Read: STOP_ STOP_ STOP_
$001D
(CONFIG2)â Write: ICLKDIS RCLKEN XCLKEN
Reset: 0
0
0
$001F
Conï¬guration Register 1 Read:
(CONFIG1)â
Write:
Reset:
COPRS
0
LVISTOP LVIRSTD
0
0
$FFCF
Mask-Option-Register Read:
(MOR)# Write: OSCSEL1 OSCSEL0
R
Erased: 1
1
1
â One-time writable register after each reset.
# MOR is a non-volatile FLASH register; write by programming.
= Unimplemented
4
OSCCLK1
0
LVIPWRD
0
R
1
3
2
OSCCLK0
0
0
0
LVIREGD SSREC
0
0
R
R
1
1
R = Reserved
1
0
0
STOP
0
R
1
Bit 0
SCIBDSRC
0
COPD
0
R
1
Figure 3-1. CONFIG and MOR Registers Summary
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
49
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