MC908AP8CFBE Datasheet, PDF (37/324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Monitor ROM
Addr.
$004D
$004E
$004F
$0050
$0051
$0052
$0053
$0054
$0055
$0056
$0057
$0058
$0059
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
MMIIC Data Receive ^Read:
Register Write:
(MMDRR) _Reset:
MMRD7
0
MMRD6
0
MMRD5
0
MMRD4
0
MMRD3
0
MMRD2
0
MMRD1
0
MMRD0
0
MMIIC CRC Data Register ^{Read: MMCRCD7 MMCRCD6 MMCRCD5 MMCRCD4 MMCRCD3 MMCRCD2 MMCRCD1 MMCRCD0}
(MMCRDR) _Write:
Reset: 0
0
0
0
0
0
0
0
MMIIC Frequency Divider ^Read:
0
0
0
0
0
MMBR2 MMBR1 MMBR0
Register Write:
(MMFDR) _Reset:
0
0
0
0
0
1
0
0
Read:
R
R
R
R
R
R
R
R
Reserved Write:
Reset:
Timebase Control Register ^{Read: TBIF}
TBR2
TBR1
TBR0
0
TBIE
TBON
R
(TBCR) Write:
TACK
Reset: 0
0
0
0
0
0
0
0
Read:
Unimplemented Write:
Reset:
Read:
Unimplemented Write:
Reset:
Read:
Unimplemented Write:
Reset:
Read:
Unimplemented Write:
Reset:
Read:
Unimplemented Write:
Reset:
ADC Status and Control ^{Read: COCO}
AIEN
ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Register Write:
(ADSCR) _Reset:
0
0
0
1
1
1
1
1
Read:
0
0
ADC Clock Control Register
(ADICLK)
Write:
ADIV2
ADIV1
ADIV0 ADICLK MODE1 MODE0
R
Reset: 0
0
0
0
0
0
0
0
Read: ADx
ADx
ADx
ADx
ADx
ADx
ADx
ADx
ADC Data Register High 0
(ADRH0)
Write:
R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
U = Unaffected
X = Indeterminate
= Unimplemented
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 9)
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
37