MC908AP8CFBE Datasheet, PDF (137/324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Functional Description
Addr.
$0020
$0021
$0022
$0023
$0024
$0025
$0026
$0027
$0028
$0029
$002A
$002B
$002C
$002D
$002E
Register Name
TIM1 Status and Control Read:
Register Write:
(T1SC) Reset:
TIM1 Counter Register Read:
High Write:
(T1CNTH) Reset:
TIM1 Counter Register Read:
Low Write:
(T1CNTL) Reset:
TIM Counter Modulo Read:
Register High Write:
(TMODH) Reset:
TIM1 Counter Modulo Read:
Register Low Write:
(T1MODL) Reset:
TIM1 Channel 0 Status Read:
and Control Register Write:
(T1SC0) Reset:
TIM1 Channel 0 Read:
Register High Write:
(T1CH0H) Reset:
TIM1 Channel 0 Read:
Register Low Write:
(T1CH0L) Reset:
TIM1 Channel 1 Status Read:
and Control Register Write:
(T1SC1) Reset:
TIM1 Channel 1 Read:
Register High Write:
(T1CH1H) Reset:
TIM1 Channel 1 Read:
Register Low Write:
(T1CH1L) Reset:
TIM2 Status and Control Read:
Register Write:
(T2SC) Reset:
TIM2 Counter Register Read:
High Write:
(T2CNTH) Reset:
TIM2 Counter Register Read:
Low Write:
(T2CNTL) Reset:
TIM2 Counter Modulo Read:
Register High Write:
(T2MODH) Reset:
Bit 7
TOF
0
0
Bit 15
0
Bit 7
0
Bit 15
1
Bit 7
1
CH0F
0
0
Bit 15
Bit 7
CH1F
0
0
Bit 15
Bit 7
TOF
0
0
Bit 15
0
Bit 7
0
Bit 15
1
6
5
4
3
2
0
0
TOIE
TSTOP
TRST
PS2
0
1
0
0
0
14
13
12
11
10
0
0
0
0
0
6
5
4
3
2
0
14
1
6
1
CH0IE
0
14
6
CH1IE
0
14
6
TOIE
0
14
0
0
0
0
13
12
11
10
1
1
1
1
5
4
3
2
1
1
1
1
MS0B MS0A ELS0B ELS0A
0
0
0
0
13
12
11
10
Indeterminate after reset
5
4
3
2
Indeterminate after reset
0
MS1A ELS1B ELS1A
0
0
0
0
13
12
11
10
Indeterminate after reset
5
4
3
2
Indeterminate after reset
TSTOP
0
TRST
0
PS2
1
0
0
0
13
12
11
10
0
0
0
0
0
6
5
4
3
2
0
0
0
0
0
14
13
12
11
10
1
1
1
1
1
= Unimplemented
Figure 9-2. TIM I/O Register Summary (Sheet 1 of 2)
1
Bit 0
PS1
PS0
0
0
9
Bit 8
0
0
1
Bit 0
0
9
1
1
1
TOV0
0
9
0
Bit 8
1
Bit 0
1
CH0MAX
0
Bit 8
1
Bit 0
TOV1
0
9
CH1MAX
0
Bit 8
1
Bit 0
PS1
PS0
0
0
9
Bit 8
0
0
1
Bit 0
0
0
9
Bit 8
1
1
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
137