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MCF5272VF66J Datasheet, PDF (365/544 Pages) Freescale Semiconductor, Inc – MCF5272 ColdFire® Integrated Microprocessor
UART Modules
Table 16-2. UMR1n Field Descriptions
Bits Name
Description
7 RxRTS Receiver request-to-send. Allows the RTS output to control the CTS input of the transmitting device to
prevent receiver overrun. If both the receiver and transmitter are incorrectly programmed for RTS control,
RTS control is disabled for both. Transmitter RTS control is configured in UMR2n[TxRTS].
0 The receiver has no effect on RTS.
1 When a valid start bit is received, RTS is negated if the UART's FIFO is full. RTS is reasserted when the
FIFO has an empty position available.
If RTS is controlled by the fill level of the receiver FIFO via UACRn[RTSL], this bit should be cleared.
6 RxIRQ/FF Receiver interrupt select.
ULL 0 RxRDY is the source that generates IRQ.
1 FFULL is the source that generates IRQ.
If more detail on the status of the FIFO is required, UISRn{RxFIFO] indicates a change in the FIFO status
as programmed in URFn[RXS].
5
ERR Error mode. Configures the FIFO status bits, USRn[RB,FE,PE].
0 Character mode. The USRn values reflect the status of the character at the top of the FIFO. ERR must
be 0 for correct A/D flag information when in multidrop mode.
1 Block mode. The USRn values are the logical OR of the status for all characters reaching the top of the
FIFO because the last RESET ERROR STATUS command for the channel was issued. See Section 16.3.5,
“UART Command Registers (UCRn).”
4–3
PM Parity mode. Selects the parity or multidrop mode for the channel. The parity bit is added to the transmitted
character, and the receiver performs a parity check on incoming data. The value of PM affects PT, as shown
below.
2
PT Parity type. PM and PT together select parity type (PM = 0x) or determine whether a data or address
character is transmitted (PM = 11).
PM
Parity Mode
Parity Type (PT= 0)
Parity Type (PT= 1)
00 With parity
01 Force parity
10 No parity
11 Multidrop mode
Even parity
Low parity
Data character
Odd parity
High parity
n/a
Address character
1–0
B/C Bits per character. Select the number of data bits per character to be sent. The values shown do not include
start, parity, or stop bits.
00 5 bits
01 6 bits
10 7 bits
11 8 bits
MCF5272 ColdFire® Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
16-5