MCF5272VF66J Datasheet, PDF (193/544 Pages) Freescale Semiconductor, Inc – MCF5272 ColdFire® Integrated Microprocessor

SDRAM Controller
Signal
SDCLK
SDCLKE
SDRAMCS/CS7
SDWE
Table 9-1. SDRAM Controller Signal Descriptions (continued)
Description
SDRAM (bus) clock (same frequency as CPU clock). This dedicated output reduces setup and hold
time uncertainty due to process and temperature variations. SDCLK is disabled for SDRAM
power-down mode.
SDRAM clock enable
SDRAM chip select/CS7. The SDRAM is assigned to CS7 (SDRAMCS) of the device chip select
module.
SDRAM write enable
Figure 9-2 is the pinout of a 16-bit SDRAM in a 54-pin TSOP (thin, small-outline package) package. Size
can vary from 16–256 Mbits.
VDD
VDD
VDD
1
DQ0
DQ0
DQ0
2
VDD
VDD
VDD
3
DQ1
DQ1
DQ1
4
DQ2
DQ2
DQ2
5
GND
GND
GND
6
DQ3
DQ3
DQ3
7
DQ4
DQ4
DQ4
8
VDD
VDD
VDD
9
DQ5
DQ5
DQ5
10
DQ6
DQ6
DQ6
11
GND
GND
GND
12
DQ7
DQ7
DQ7
13
VDD
VDD
VDD
14
DQML DQML DQML
15
R/W
R/W
R/W
16
CAS
CAS
CAS
17
RAS
RAS
RAS
18
CS
CS
CS
19
BA0
BA0
BA0
20
BA1
BA1
BA1
21
A10
A10
A10
22
A0
A0
A0
23
A1
A1
A1
24
A2
A2
A2
25
A3
A3
A3
26
VDD
VDD
VDD
27
64 Mbit
128 Mbit
256 Mbit
54
GND GND
GND
53
DQ15 DQ15 DQ15
52
GND GND
GND
51
DQ14 DQ14 DQ14
50
DQ13 DQ13 DQ13
49
VDD VDD
VDD
48
DQ12 DQ12 DQ12
47
DQ11 DQ11 DQ11
46
GND GND
GND
45
DQ10 DQ10 DQ10
44
DQ9
DQ9
DQ9
43
VDD VDD
VDD
42
DQ8
DQ8
DQ8
41
GND GND
GND
40
NC
NC
NC
39
DQMH DQMH DQMH
38
CLK
CLK
CLK
37
CKE
CKE
CKE
36
A12
A12
A12
35
A11
A11
A11
34
A9
A9
A9
33
A8
A8
A8
32
A7
A7
A7
A6
A6
A6
31
30
A5
A5
A5
29
A4
A4
A4
28
GND GND
GND
Figure 9-2. 54-Pin TSOP SDRAM Pin Definition
MCF5272 ColdFire^® Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
9-3