MCF5272VF66J Datasheet, PDF (24/544 Pages) Freescale Semiconductor, Inc – MCF5272 ColdFire® Integrated Microprocessor

Table of Contents (Continued)
Paragraph
Number
Title
Page
Number
Chapter 16
UART Modules
16.1 Overview .................................................................................................................................... 16-1
16.2 Serial Module Overview ............................................................................................................ 16-2
16.3 Register Descriptions ................................................................................................................. 16-2
16.3.1 UART Mode Registers 1 (UMR1n) ............................................................................... 16-4
16.3.2 UART Mode Register 2 (UMR2n) ................................................................................. 16-6
16.3.3 UART Status Registers (USRn) ..................................................................................... 16-7
16.3.4 UART Clock-Select Registers (UCSRn) ........................................................................ 16-8
16.3.5 UART Command Registers (UCRn) .............................................................................. 16-9
16.3.6 UART Receiver Buffers (URBn) ................................................................................. 16-10
16.3.7 UART Transmitter Buffers (UTBn) ............................................................................. 16-11
16.3.8 UART Input Port Change Registers (UIPCRn) ............................................................ 16-11
16.3.9 UART Auxiliary Control Registers (UACRn) ............................................................. 16-12
16.3.10 UART Interrupt Status/Mask Registers (UISRn/UIMRn) .......................................... 16-12
16.3.11 UART Divider Upper/Lower Registers (UDUn/UDLn) ............................................ 16-14
16.3.12 UART Autobaud Registers (UABUn/UABLn) .......................................................... 16-14
16.3.13 UART Transmitter FIFO Registers (UTFn) ............................................................... 16-15
16.3.14 UART Receiver FIFO Registers (URFn) ................................................................... 16-16
16.3.15 UART Fractional Precision Divider Control Registers (UFPDn) .............................. 16-17
16.3.16 UART Input Port Registers (UIPn) ............................................................................ 16-17
16.3.17 UART Output Port Command Registers (UOP1n/UOP0n) ....................................... 16-18
16.4 UART Module Signal Definitions ........................................................................................... 16-18
16.5 Operation ................................................................................................................................. 16-19
16.5.1 Transmitter/Receiver Clock Source .............................................................................. 16-19
16.5.1.1 Programmable Divider .................................................................................... 16-20
16.5.1.2 Calculating Baud Rates ................................................................................... 16-20
16.5.1.2.1 CLKIN Baud Rates ................................................................................ 16-20
16.5.1.2.2 External Clock........................................................................................ 16-21
16.5.1.2.3 Autobaud Detection ............................................................................... 16-21
16.5.2 Transmitter and Receiver Operating Modes ................................................................. 16-22
16.5.2.1 Transmitting ................................................................................................... 16-22
16.5.2.2 Receiver .......................................................................................................... 16-24
16.5.2.3 Transmitter FIFO ............................................................................................ 16-25
16.5.2.4 Receiver FIFO ............................................................................................... 16-25
16.5.3 Looping Modes ............................................................................................................. 16-26
16.5.3.1 Automatic Echo Mode .................................................................................... 16-27
16.5.3.2 Local Loop-Back Mode .................................................................................. 16-27
16.5.3.3 Remote Loop-Back Mode ............................................................................... 16-27
16.5.4 Multidrop Mode ............................................................................................................ 16-28
MCF5272 ColdFire^® Integrated Microprocessor User’s Manual, Rev. 3
xxiv
Freescale Semiconductor