MCF5272VF66J Datasheet, PDF (227/544 Pages) Freescale Semiconductor, Inc – MCF5272 ColdFire® Integrated Microprocessor

Ethernet Module
11.4.8 Ethernet Error-Handling Procedure
The FEC reports frame reception and transmission error conditions through the buffer descriptors and the
EIR register.
11.4.8.1 Transmission Errors
Transmission errors are defined in Table 11-4.
Table 11-4. Transmission Errors
Error
Description
Transmitter
Underrun
The FEC sends 32 bits that ensure a CRC error and stops transmitting. All remaining buffers for that frame
are then flushed and closed, with the UN bit set in the last TxBD for that frame. The FEC continues to the
next TxBD and begins transmitting the next frame.
Carrier Sense When this error occurs and no collision is detected in the frame, the FEC sets the CSL bit in the last TxBD
Lost during Frame for this frame. The frame is sent normally. No retries are performed as a result of this error. The CSL bit is
Transmission not set if TCR[FDEN] = 1, regardless of the state of CRS.
Retransmission
Attempts Limit
Expired
Late Collision¹
When this error occurs, the FEC terminates transmission. All remaining buffers for that frame are then
flushed and closed, with the RL bit set in the last TxBD for that frame. The FEC then continues to the next
TxBD and begins sending the next frame.
The FEC stops sending. All remaining buffers for that frame are then flushed and closed, with the LC bit set
in the last TxBD for that frame. The FEC then continues to the next TxBD and begins sending the next frame.
Heartbeat
Some transceivers have a self-test feature called heartbeat or signal-quality error. To signify a good self-test,
the transceiver indicates a collision within 20 clocks after the FEC sends a frame. This heartbeat condition
does not imply a real collision, but that the transceiver seems to be functioning properly.
If TCR[HBC] is set and the heartbeat condition is not detected by the FEC after a frame transmission, then
a heartbeat error occurs. When this error occurs, the FEC closes the buffer, sets the HB bit in the Tx BD,
and generates the HBERR interrupt if it is enabled.
1 _{The definition of what constitutes a late collision is hard-wired in the FEC.}
11.4.8.2 Reception Errors
Table 11-5 describes reception errors.
Table 11-5. Reception Errors
Error
Description
Overrun Error The FEC maintains an internal FIFO for receiving data. If a receiver FIFO overrun occurs, the FEC closes the
buffer and sets RxBD[OV].
Non-Octet Error The FEC handles up to seven dribbling bits when the receive frame terminates non-octet aligned and it checks
(Dribbling Bits) the CRC of the frame on the last octet boundary. If there is a CRC error, the frame non-octet aligned (NO)
error is reported in the RxBD. If there is no CRC error, no error is reported.
CRC Error When a CRC error occurs with no dribbling bits, the FEC closes the buffer and sets RxBD[CR]. CRC checking
cannot be disabled, but the CRC error can be ignored if checking is not required.
Frame Length When the receive frame length exceeds R_HASH[MAX_FRAME_LENGTH], EIR[BABR] is set indicating
Violation babbling receive error, and the LG bit in the end of frame RxBD is set.
Note: Receive frames exceeding 2047 bytes are truncated.
MCF5272 ColdFire^® Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
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