MC68HC908GR16A Datasheet, PDF (29/270 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Input/Output (I/O) Section
Addr.
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
$0008
$0009
$000A
$000B
Register Name
Port A Data Register ^Read:
(PTA) Write:
See page 118. _Reset:
Port B Data Register ^Read:
(PTB) Write:
See page 120. _Reset:
Port C Data Register ^Read:
(PTC) Write:
See page 122. _Reset:
Port D Data Register ^Read:
(PTD) Write:
See page 124. _Reset:
Data Direction Register A ^Read:
(DDRA) Write:
See page 118. _Reset:
Data Direction Register B ^Read:
(DDRB) Write:
See page 121. _Reset:
Data Direction Register C ^Read:
(DDRC) Write:
See page 122. _Reset:
Data Direction Register D ^Read:
(DDRD) Write:
See page 125. _Reset:
Port E Data Register ^Read:
(PTE) Write:
See page 127. _Reset:
ESCI Prescaler Register ^Read:
(SCPSC) Write:
See page 166. _Reset:
ESCI Arbiter Control ^Read:
Register (SCIACTL) Write:
See page 170. _Reset:
ESCI Arbiter Data ^Read:
Register (SCIADAT) Write:
See page 171. _Reset:
Bit 7
PTA7
PTB7
1
PTD7
DDRA7
0
DDRB7
0
0
0
DDRD7
0
0
PDS2
0
AM1
0
ARD7
0
6
PTA6
PTB6
PTC6
PTD6
DDRA6
0
DDRB6
0
DDRC6
0
DDRD6
0
0
PDS1
0
ALOST
0
ARD6
0
5
PTA5
PTB5
PTC5
PTD5
DDRA5
0
DDRB5
0
DDRC5
0
DDRD5
0
PTE5
PDS0
0
AM0
0
ARD5
0
4
3
PTA4
PTA3
Unaffected by reset
PTB4
PTB3
Unaffected by reset
PTC4
PTC3
Unaffected by reset
PTD4
PTD3
Unaffected by reset
DDRA4 DDRA3
0
0
DDRB4 DDRB3
0
0
DDRC4 DDRC3
0
0
DDRD4 DDRD3
0
0
PTE4
PTE3
Unaffected by reset
PSSB4 PSSB3
0
0
AFIN
ACLK
0
0
ARD4
ARD3
0
0
2
PTA2
1
PTA1
Bit 0
PTA0
PTB2
PTB1
PTB0
PTC2
PTC1
PTC0
PTD2
PTD1
PTD0
DDRA2
0
DDRB2
0
DDRC2
0
DDRD2
0
PTE2
DDRA1
0
DDRB1
0
DDRC1
0
DDRD1
0
PTE1
DDRA0
0
DDRB0
0
DDRC0
0
DDRD0
0
PTE0
PSSB2 PSSB1 PSSB0
0
ARUN
0
AROVFL
0
ARD8
0
ARD2
0
0
ARD1
0
0
ARD0
0
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 7)
MC68HC908GR16A Data Sheet, Rev. 1.0
Freescale Semiconductor
29