MSC8154E Datasheet, PDF (28/68 Pages) Freescale Semiconductor, Inc – Quad-Core Digital Signal Processor with Security

Electrical Characteristics
2.5.1.4 DDR Reference Current Draw
Table 9 lists the current draw characteristics for MV_REF.
Note: Values when used at recommended operating conditions (see Table 3).
Table 9. Current Draw Characteristics for MV_REF
Parameter / Condition
Symbol
Min
Current draw for MV_REFn
• DDR2 SDRAM
• DDR3 SDRAM
I_MVREFn
—
Max
300
250
Unit
μA
μA
2.5.2 High-Speed Serial Interface (HSSI) DC Electrical Characteristics
The MSC8154E features an HSSI that includes two 4-channel SerDes ports used for high-speed serial interface applications
(PCI Express, Serial RapidIO interfaces, and SGMII). This section and its subsections describe the common portion of the
SerDes DC, including the DC requirements for the SerDes reference clocks and the SerDes data lane transmitter (Tx) and
receiver (Rx) reference circuits. The data lane circuit specifications are specific for each supported interface, and they have
individual subsections by protocol. The selection of individual data channel functionality is done via the Reset Configuration
Word High Register (RCWHR) SerDes Protocol selection fields (S1P and S2P). Specific AC electrical characteristics are
defined in Section 2.6.2, “HSSI AC Timing Specifications.”
2.5.2.1 Signal Term Definitions
The SerDes interface uses differential signaling to transfer data across the serial link. This section defines terms used in the
description and specification of differential signals. Figure 4 shows how the signals are defined. For illustration purposes only,
one SerDes lane is used in the description. Figure 4 shows the waveform for either a transmitter output (SR[1–2]_TX and
SR[1–2]_TX) or a receiver input (SR[1–2]_RX and SR[1–2]_RX). Each signal swings between A volts and B volts where
A > B.
A Volts
SR[1–2]_TX or
SR[1–2]_RX
B Volts
SR[1–2]_TX or
SR[1–2]_RX
V_cm = (A + B)/2
Differential Swing, V_ID or V_OD = A – B
Differential Peak Voltage, V_DIFFp = |A – B|
Differential Peak-Peak Voltage, V_DIFFpp = 2 × V_DIFFp (not shown)
Figure 4. Differential Voltage Definitions for Transmitter or Receiver
MSC8154E Quad-Core Digital Signal Processor with Security Data Sheet, Rev. 0
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Freescale Semiconductor