33892 Datasheet, PDF (24/28 Pages) Freescale Semiconductor, Inc – Quad Intelligent High-Side Switch

Freescale Semiconductor, Inc.
Loss of V_DD
If the external 5.0 V supply is not within specification, or even
disconnected, all register content is reset. The outputs can still
be driven by the direct inputs IN[0:3]. The 33892 uses the
battery input to power the output MOSFET-related current
sense circuitry and any other internal logic providing fail-safe
device operation with no V_DD supplied. In this state, the
watchdog, overvoltage, overtemperature, and overcurrent
circuitry are fully operational with default values.
Fault Mode
The 33892 indicates the faults below as they occur by driving
the FS terminal to [0]:
• Overtemperature fault
• Overvoltage and Undervoltage fault
• Open load fault
• Overcurrent fault (high and low)
The FS terminal will automatically return to [1] when the fault
condition is removed, except for overcurrent and in some cases
undervoltage.
Fault information is retained in the fault register and is
available (and reset) via the SO terminal during the first valid
SPI communication (refer to Table 10, page 22).
Overtemperature Fault (Non-Latching)
The 33892 incorporates overtemperature detection and
shutdown circuitry in the output structure. Overtemperature
detection is enabled when the output is in the ON state.
For the output, an overtemperature fault (OTF) condition
results in the faulted output turning OFF until the temperature
falls below the T_SD(HYS). This cycle will continue indefinitely until
action is taken by the MCU to shut OFF the output, or until the
offending load is removed.
When experiencing this fault, the OTF fault bit will be set in
the status register and cleared after either a valid SPI read or a
power reset of the device.
Overvoltage Fault (Non-Latching)
The 33892 shuts down the output during an overvoltage fault
(OVF) condition on the V_PWR terminal. The output remains in
the OFF state until the overvoltage condition is removed. When
experiencing this fault, the OVF fault bit is set in the bit D1 and
cleared after either a valid SPI read or a power reset of the
device.
The overvoltage protection can be disabled through SPI (bit
OV_DIS). When disabled, the returned SO bit OD13 still reflects
any overvoltage condition (overvoltage warning).
Undervoltage Shutdown (Latching or Non-Latching)
The output latches OFF at some battery voltage between
4.75 V and 5.75 V. As long as the V_DD level stays within the
normal specified range, the internal logic states within the
device will be sustained. This ensures that when the battery
level then returns above 5.75 V, the 33892 can be returned to
the state that it was in prior to the low V_PWR excursion. Once the
output latches OFF, the outputs must be turned OFF and ON
again to re-enable them. In the case IN[1:0]=0, this fault is non-
latched.
The undervoltage protection can be disabled through SPI (bit
UV_DIS). When disabled, the returned SO bit OD14 still reflects
any undervoltage condition (undervoltage warning).
Open Load Fault (Non-Latching)
The 33892 incorporates open load detection circuitry on the
output. Output open load fault (OLF) is detected and reported
as a fault condition when the output is disabled (OFF). The
open load fault is detected and latched into the status register
after the internal gate voltage is pulled low enough to turn OFF
the output. The OLF fault bit is set in the status register. If the
open load fault is removed, the status register will be cleared
after reading the register.
The open load protection can be disabled trough SPI (bit
OL_DIS).
Overcurrent Fault (Latching)
The 33892 has eight programmable overcurrent low
detection levels (I_OCL) and two programmable overcurrent high
detection levels (I_OCH) for maximum device protection. The two
selectable, simultaneously active overcurrent detection levels,
defined by I_OCH and I_OCL, are illustrated in Figure 4, page 15.
The eight different overcurrent low detection levels (I_OCL0,
I_OCL1, I_OCL2, I_OCL3, I_OCL4, I_OCL5, I_OCL6, and I_OCL7) are
illustrated in Figure 4.
If the load current level ever reaches the selected
overcurrent low detection level and the overcurrent condition
exceeds the programmed overcurrent time period (t_OCx), the
device will latch the output OFF.
If, at any time, the current reaches the selected I_OCH level,
then the device will immediately latch the fault and turn OFF the
output, regardless of the selected t_OCLx driver.
For both cases, the device output will stay off indefinitely until
the device is commanded OFF and then ON again.
Reverse Battery
The output survives the application of reverse voltage as low
as -16 V. Under these conditions, the output’s gate is enhanced
to keep the junction temperature less than 150°C. The ON
resistance of the output is fairly similar to that in the Normal
mode. No additional passive components are required.
Ground Disconnect Protection
In the event the 33892 ground is disconnected from load
ground, the device protects itself and safely turns OFF the
output regardless of the state of the output at the time of
disconnection.
33892
24
For More Information O^Mn^OTT^Oh^Ri^Os^LAPr^Ao^Nd^Au^LOc^Gt,^{INTEGRATED CIRCUIT DEVICE DATA}
Go to: www.freescale.com