33892 Datasheet, PDF (22/28 Pages) Freescale Semiconductor, Inc – Quad Intelligent High-Side Switch

Freescale Semiconductor, Inc.
Table 9. Serial Output Bit Map Description
Previous STATR
SO Returned Data
SO SO SO SO SO OD
A4 A3 A2 A1 A0 ₁₅
OD
14
OD
13
OD
12
OD
11
OD
10
OD9 OD8 OD7 OD6 OD5 OD4
OD3
OD2
OD1
OD0
A₁ A₀ 0 0 0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0
x 0 0 0 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0
OTF_s
IN_SPI3
OCHF_s
IN_SPI2
OCLF_s
IN_SPI1
OLF_s
IN_SPI0
x 1 0 0 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 CSNS EN3 CSNS EN2 CSNS EN1 CSNS EN0
A₁ A₀ 0 1 0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 SOCH_s
SOCL2_s
SOCL1_s SOCL0_s
A₁ A₀ 0 1 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 OL_DIS_s
OCL_DIS_s
OCLT1_s OCLT0_s
A₁ A₀ 1 0 0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 Fast_SR_s CSNS_high_s DIR_DIS_s
A/O_s
x 0 1 0 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0
–
–
UV_DIS
OV_DIS
x 1 1 0 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0
–
WDTO
WD1
WD0
x 0 1 1 0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 HS2_failsaf HS0_failsaf
WD_en
WAKE
x 1 1 1 0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0
IN3
IN2
IN1
IN0
x=Don’t care.
s=Output selection with the bits A₁A₀ as defined in Table 3, page 19.
Previous Address SOA[4:0]=A₁A₀000
The bits OD[3:0] will reflect the current state of the Fault
Register (FLTR) corresponding to the output previously
selected with the bits A₁A₀ (Table 10).
Table 10. Channel-Specific Fault Register
OD3
OD2
OD1
OD0
OTF_s
OCHF_s
OCLF_s
OLF_s
s=Selection of the output.
Note The FS terminal reports all faults. For latched faults,
this terminal is reset by a new Switch ON command (via SPI or
direct input IN).
Previous Address SOA[4:0]=x0001
Data in bits OD[3:0] contains IN_SPI[3:0]-programmed bits
for channel from HS3 to HS0, respectively.
Previous Address SOA[4:0]=x1001
Data in bits OD[3:0] contains the programmed CSNS EN[3:0]
bits for channels HS3 to HS0, respectively.
Previous Address SOA[4:0]=A₁A₀010
Data returned in bits OD[3:0] are programmed current values
for the overcurrent high detection level (refer to Table 5,
page 20) and the overcurrent low detection level (refer to
Table 4, page 20), corresponding to the output previously
selected with A₁A₀.
Previous Address SOA[4:0]=A₁A₀011
The returned data contains the programmed values in the
CDTOLR register for the output selected with A₁A₀.
Previous Address SOA[4:0]=A₁A₀100
The returned data contains the programmed values in the
DICR register for the output selected with A₁A₀.
Previous Address SOA[4:0]=A₁A₀101
The returned data contains the programmed values in the
UOVR register.
Previous Address SOA[4:0]=x1101
The returned data contains the programmed values in the
WDR register. Bit OD2 (WDTO) reflects the status of the
watchdog circuitry. If WDTO bit is [1], the watchdog has timed
out and the 33892 is in Fail-Safe mode. IF WDTO is [0], the
device is in Normal mode (assuming the device is powered and
not in the Sleep mode), with the watchdog either enabled or
disabled.
Previous Address SOA[4:0]=x0110
The returned data OD3 and OD2 contain the state of the
outputs HS2 and HS0, respectively, in case of Fail-Safe state.
This information is stated with the external resistance placed at
the FSI terminal. OD1 indicates if the watchdog is enabled or
not. OD0 returns the state of the WAKE terminal.
Previous Address SOA[4:0]=x1110
The returned data OD[3:0] reflects the state of the direct
terminals IN3 to IN0, respectively.
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