MC9S12DT128_1002 Datasheet, PDF (23/140 Pages) Freescale Semiconductor, Inc – Device User Guide

Device User Guide — 9S12DT128DGV2/D V02.17
– Port S[3:2]
PS3:2 must be configured as outputs or their pull resistors must be enabled to avoid floating
inputs.
– PAD[15:8] (ATD1 channels)
Out of reset the ATD1 is disabled preventing current flows in the pins. Do not modify the ATD1
registers!
Document References
The Device User Guide provides information about the MC9S12DT128 device made up of standard
HCS12 blocks and the HCS12 processor core.
This document is part of the customer documentation. A complete set of device manuals also includes all
the individual Block User Guides of the implemented modules. In a effort to reduce redundancy all module
specific information is located only in the respective Block User Guide. If applicable, special
implementation details of the module are given in the block description sections of this document.
See Table 0-3 for names and versions of the referenced documents throughout the Device User Guide.
Table 0-3 Document References
User Guide
Version
HCS12 CPU Reference Manual
V02
HCS12 Module Mapping Control (MMC) Block Guide
V04
HCS12 Multiplexed External Bus Interface (MEBI) Block Guide
V03
HCS12 Interrupt (INT) Block Guide
V01
HCS12 Background Debug Module (BDM) Block Guide
V04
HCS12 Breakpoint (BKP) Block Guide
V01
Clock and Reset Generator (CRG) Block User Guide
V04
Oscillator (OSC) Block User Guide
V02
Enhanced Capture Timer 16 Bit 8 Channel (ECT_16B8C) Block User Guide
V01
Analog to Digital Converter 10 Bit 8 Channel (ATD_10B8C) Block User Guide
V02
Inter IC Bus (IIC) Block User Guide
V02
Asynchronous Serial Interface (SCI) Block User Guide
V02
Serial Peripheral Interface (SPI) Block User Guide
V02
Pulse Width Modulator 8 Bit 8 Channel (PWM_8B8C) Block User Guide
V01
128K Byte Flash (FTS128K) Block User Guide
V02
2K Byte EEPROM (EETS2K) Block User Guide
V01
Byte Level Data Link Controller -J1850 (BDLC) Block User Guide
V01
Motorola Scalable CAN (MSCAN) Block User Guide
V02
Voltage Regulator (VREG) Block User Guide
V01
Port Integration Module (PIM_9DTB128) Block User Guide
V02
Byteflight (BF) Block User Guide
V01
Document Order Number
S12CPUV2/D
S12MMCV4/D
S12MEBIV3/D
S12INTV1/D
S12BDMV4/D
S12BKPV1/D
S12CRGV4/D
S12OSCV2/D
S12ECT16B8CV1/D
S12ATD10B8CV2/D
S12IICV2/D
S12SCIV2/D
S12SPIV2/D
S12PWM8B8CV1/D
S12FTS128KV2/D
S12EETS2KV1/D
S12BDLCV1/D
S12MSCANV2/D
S12VREGV1/D
S12DTB128PIMV2/D
S12BFV1/D
Freescale Semiconductor
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