MC9S12DT128_1002 Datasheet, PDF (100/140 Pages) Freescale Semiconductor, Inc – Device User Guide

Device User Guide — 9S12DT128DGV2/D V02.17
PD = Total Chip Power Dissipation, [W]
Θ_JA = Package Thermal Resistance, [°C/W]
The total power dissipation can be calculated from:
PD = PINT + PIO
PINT = Chip Internal Power Dissipation, [W]
Two cases with internal voltage regulator enabled and disabled must be considered:
1. Internal Voltage Regulator disabled
PINT = IDD ⋅ VDD + IDDPLL ⋅ VDDPLL + IDDA ⋅ VDDA
∑ ^{PIO =} _i ^{RDSON ⋅ IIOi2}
Which is the sum of all output currents on I/O ports associated with VDDX and VDDR.
For R_DSON is valid:
RDSON = ^{V--I--O-O----L-L-} ;for outputs driven low
respectively
RDSON = -V----D----D----I-5-O----^–-H---V-----O-----H-- ;for outputs driven high
2. Internal voltage regulator enabled
PINT = IDDR ⋅ VDDR + IDDA ⋅ VDDA
I_DDR is the current shown in (Table A-7) and not the overall current flowing into VDDR, which
additionally contains the current flowing into the external loads with output high.
∑ ^{PIO =} _i ^{RDSON ⋅ IIOi2}
Which is the sum of all output currents on I/O ports associated with VDDX and VDDR.
102
Freescale Semiconductor