K60P100M100SF2 Datasheet, PDF (22/73 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Peripheral operating requirements and behaviors
• are configured for fast slew rate (PORTx_PCRn[SRE]=0), and
• are configured for high drive strength (PORTx_PCRn[DSE]=1)
2. input pins
• have their passive filter disabled (PORTx_PCRn[PFE]=0)
6.1 Core modules
6.1.1 Debug trace timing specifications
Table 10. Debug trace operating behaviors
Symbol
T_cyc
T_wl
T_wh
T_r
T_f
T_s
T_h
Description
Clock period
Low pulse width
High pulse width
Clock and data rise time
Clock and data fall time
Data setup
Data hold
Min.
Max.
Frequency dependent
2
—
2
—
—
3
—
3
3
—
2
—
Unit
MHz
ns
ns
ns
ns
ns
ns
TRACE_CLKOUT
TRACE_D[3:0]
Figure 3. TRACE_CLKOUT specifications
Ts
Th
Ts
Th
Figure 4. Trace data specifications
K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
22
Preliminary
Freescale Semiconductor, Inc.