English
Language : 

MC68HC908AZ60A_13 Datasheet, PDF (156/414 Pages) Freescale Semiconductor, Inc – Microcontrollers
Monitor ROM (MON)
14.3.2 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
(See Figure 14-2 and Figure 14-3.)
The data transmit and receive rate can be anywhere up to 28.8 kBaud. Transmit and receive baud rates
must be identical.
NEXT
START
START
BIT
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 STOP BIT
BIT
Figure 14-2. Monitor Data Format
$A5
BREAK
START
BIT
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7
START
BIT
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7
Figure 14-3. Sample Monitor Waveforms
STOP
BIT
STOP
BIT
NEXT
START
BIT
NEXT
START
BIT
14.3.3 Echoing
As shown in Figure 14-4, the monitor ROM immediately echoes each received byte back to the PTA0 pin
for error checking.
Any result of a command appears after the echo of the last byte of the command.
SENT TO
MONITOR
READ
READ
ADDR. HIGH ADDR. HIGH ADDR. LOW ADDR. LOW
DATA
ECHO
RESULT
Figure 14-4. Read Transaction
14.3.4 Break Signal
A start bit followed by nine low bits is a break signal. (See Figure 14-5). When the monitor receives a break
signal, it drives the PTA0 pin high for the duration of two bits before echoing the break signal.
MISSING STOP BIT
TWO-STOP-BIT DELAY BEFORE ZERO ECHO
01234567
01234567
Figure 14-5. Break Transaction
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
156
Freescale Semiconductor