MC68HC908AZ60A_13 Datasheet, PDF (147/414 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 12
Configuration Register (CONFIG-2)
12.1 Introduction
This chapter describes the configuration register (CONFIG-2). This register contains bits that configure
these options:
• Configures the device to either the MC68HC08AZxx emulator or the MC68HC08ASxx emulator
• Disables the CAN module
12.2 Functional Description
The configuration register is a write-once register. Out of reset, the configuration register will read the
default. Once the register is written, further writes will have no effect until a reset occurs.
Address: $FE09
Bit 7
6
5
4
3
2
1
Bit 0
Read: _EEDIV
Write: ^CLK
R
AT60A
R
MSCAND
R
R
R
AZxx
Reset: 0
0
0
1
1
0
0
0
R
= Reserved
Figure 12-1. Configuration Register (CONFIG-2)
AT60A — Device Indicator
This read-only bit is used to distinguish an MC68HC908AS60A and MC68HC908AZ60A from older
non-’A’ suffix versions.
1 = ‘A’ version
0 = Non-’A’ version
EEDIVCLK — EEPROM Timebase Divider Clock Select Bit
This bit selects the reference clock source for the EEPROM-1 and EEPROM-2 timebase divider
modules.
1 = EExDIV clock input is driven by internal bus clock
0 = EExDIV clock input is driven by CGMXCLK
MSCAND — MSCAN Disable Bit
MSCAND disables the MSCAN module. (See Chapter 23 MSCAN Controller (MSCAN08)).
1 = MSCAN module disabled
0 = MSCAN Module enabled
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
147