AK4115-A Datasheet, PDF (6/32 Pages) Asahi Kasei Microsystems – Evaluation Board Rev.3

ASAHI KASEI
[AKD4115-A]
(2) Evaluation for DIT
1. Synchronous mode
ADC
MCLK
BICK
LRCK
DAUX
PORT2
(10pin Header)
PORT5
(10pin Header)
MCLK
BICK
LRCK
DAUX
AK4115
(DIT)
Optical, XLR or
BNC connector
AKD4115-A
S/PDIF
2. Asynchronous mode
ADC
EMCK
EBICK
ELRCK
DAUX
PORT2
(10pin Header)
EMCK
EBICK
ELRCK
DAUX
AK4115
(DIT)
Optical, XLR or
BNC connector
S/PDIF
AKD4115-A
MCLK, BICK, LRCK and DAUX are input the via 10pin header (PORT5: DIT). The AKD4115-A can be
connected with the AKM’s ADC evaluation board via 10-pin cable.
a. Set-up of a Bi-phase output signal
TX0 and TXP0/TXN0 should not select an optical connector or a BNC connector at the same time.
a-1. The data outputted from TXP1/TXN1 can be selected by OPS12-10 bit.
Connector
JP19 (TXP1) JP14 (TXN1)
Optical (PORT4)
OPT
BNC
XLR (J3)
XLR
XLR
BNC (J4)
BNC
BNC
Table 9. Set-up of TXP1/TXN1
a-2. As for TX0, only the loop back mode of RX corresponds. This mode is fixed to RX0 in parallel mode. In
serial mode, it can be selected by OPS02-00 bits.
Connector
Optical (PORT4)
BNC (J4)
JP13 (TX0) JP19 (TXP1)
OPT
Open
BNC
Open
Table 10. Set-up of TX0
JP14 (TXN1)
BNC
BNC
<KM076403>
-6-
2006/08